Cache coherency mechanism
    4.
    发明申请
    Cache coherency mechanism 审中-公开
    缓存一致机制

    公开(公告)号:US20050228952A1

    公开(公告)日:2005-10-13

    申请号:US10823300

    申请日:2004-04-13

    IPC分类号: G06F12/00 G06F12/08

    CPC分类号: G06F12/0817

    摘要: The present invention minimizes the amount of traffic that traverses the fabric in support of the cache coherency protocol. It also allows rapid transmission of all traffic associated with the cache coherency protocol, so as to minimize latency and maximize performance. A fabric is used to interconnect a number of processing units together. The switches are able to recognize incoming traffic related to the cache coherency protocol and then move these messages to the head of that switch's output queue to insure fast transmission. Also, the traffic related to the cache coherency protocol can interrupt an outgoing message, further reducing latency. The switch incorporates a memory element, dedicated to the cache coherency protocol, which tracks the contents of all of the caches of all of the processors connected to the fabric. In this way, the fabric can selectively transmit traffic only to the processors where it is relevant.

    摘要翻译: 本发明最大限度地减少了支持高速缓存一致性协议的通过结构的业务量。 它还允许与高速缓存一致性协议相关联的所有业务的快速传输,以便最小化等待时间并最大化性能。 织物用于将多个处理单元互连在一起。 交换机能够识别与缓存一致性协议相关的传入流量,然后将这些消息移动到该交换机的输出队列的头部以确保快速传输。 此外,与缓存一致性协议相关的流量可以中断外发消息,进一步减少延迟。 该交换机包含专用于高速缓存一致性协议的存储器元件,其跟踪连接到该结构的所有处理器的所有高速缓存的内容。 以这种方式,结构可以选择性地将流量传输到与其相关的处理器。

    Dragchain substitute
    5.
    发明授权
    Dragchain substitute 失效
    Dragchain替代品

    公开(公告)号:US5322480A

    公开(公告)日:1994-06-21

    申请号:US805685

    申请日:1991-12-10

    摘要: A dragchain substitute in the form of a line guiding assembly comprising at least one line receiving channel for receiving at least one line loosely disposed therein. At least one of the channel walls of each line receiving channel is designed in projecting manner and resilient towards the channel interior relative to a channel wall supporting it, such that the line can be urged from outside of the line receiving channel through the resilient channel wall and into the interior of the line receiving channel and is enclosed in the line receiving channel after said resilient channel wall has resiled.

    摘要翻译: 线引导组件形式的拖链替代物,其包括至少一个线接收通道,用于接收松散地设置在其中的至少一个线。 每个线路接收通道的通道壁中的至少一个被设计成突出的方式并且相对于支撑它的通道壁而朝向通道内部弹性,使得线可以从线接收通道的外部通过弹性通道壁 并且进入线路接收通道的内部,并且在所述弹性通道壁已经复位之后被封闭在线路接收通道中。

    Line guiding assembly with rolling device
    6.
    发明授权
    Line guiding assembly with rolling device 失效
    带导向装置的导线组件

    公开(公告)号:US5230420A

    公开(公告)日:1993-07-27

    申请号:US994187

    申请日:1992-12-21

    CPC分类号: H02G11/00

    摘要: A line guiding assembly is provided comprising a line assembly including one or more lines and having a first length and a second length extending parallel thereto. The length ends are connected to a stationary element and to a reciprocable element in the line longitudinal direction, respectively. The two lengths merge with each other in loop-shaped manner in a bending portion located therebetween. The line assembly, at least in the portion in which the two lengths are facing each other, is provided with a material having good slidability for sliding on each other. A roller is introduced in the bending portion in such a manner that, upon movement of the reciprocable element, the line assembly performs a rolling motion on the roller.

    摘要翻译: 提供了一种线引导组件,其包括线组件,该线组件包括一条或多条线,并且具有第一长度和与其平行延伸的第二长度。 长度端部分别连接到静止元件和沿纵向方向的可往复运动的元件。 这两个长度在环形的弯曲部分之间彼此合并。 线组件至少在两个长度彼此面对的部分中设置有具有良好滑动性的材料以彼此滑动。 辊子以这样的方式被引入弯曲部分,即当往复运动的元件移动时,线组件在辊子上进行滚动运动。

    System and method for storing a sequential data stream
    7.
    再颁专利
    System and method for storing a sequential data stream 有权
    用于存储顺序数据流的系统和方法

    公开(公告)号:USRE44402E1

    公开(公告)日:2013-07-30

    申请号:US12943839

    申请日:2010-11-10

    IPC分类号: G06F12/00

    CPC分类号: G11C7/1006

    摘要: The present invention provides an improved apparatus and method for the receipt of high-speed sequential data streams. It utilizes the concept of banked memories to reduce the required speed and size of the input buffers used to receive the data streams. This allows the device to employ large, relatively slow memory elements, thereby permitting large amounts of sequential data to be stored by the receiving device. Using control information that was written as the data was being stored in the memory banks, a reordering element is later able to retrieve the data elements from the plurality of memory banks, in an order that is different from that in which the stream was received, and to reassemble the data stream into the original sequence.

    摘要翻译: 本发明提供了一种用于接收高速顺序数据流的改进的装置和方法。 它利用存储存储器的概念来减少用于接收数据流的输入缓冲器所需的速度和大小。 这允许设备使用大的相对较慢的存储器元件,从而允许接收设备存储大量的顺序数据。 使用作为数据写入的控制信息被存储在存储体中,重排序元件随后能够以与接收流不同的顺序从多个存储体中检索数据元素, 并将数据流重组为原始序列。

    Queuing system
    9.
    发明授权
    Queuing system 有权
    排队系统

    公开(公告)号:US07957275B2

    公开(公告)日:2011-06-07

    申请号:US10937662

    申请日:2004-09-09

    申请人: Karl Meier

    发明人: Karl Meier

    IPC分类号: H04L12/26 H04L12/54 H04L12/56

    摘要: An improved architecture for switches and a method for transmitting data with the switching are disclosed. An increased amount of memory is utilized, operating at speeds lower than are required by Input Queued switches, and a simple scheduling algorithm. The architecture divides the input ports into groups, where each input port group has an associated set of memory elements. Incoming packets are routed to the appropriate element in the set of memory elements. The number of groups and the number of ports that are included in each group can be varied, allowing the architecture to be modified based on the system architecture, the semiconductor technology, and other design considerations.

    摘要翻译: 公开了用于交换机的改进的架构和用于通过切换来发送数据的方法。 使用增加的内存量,以低于输入排队交换机所需的速度运行,以及简单的调度算法。 该架构将输入端口分成组,其中每个输入端口组具有相关的一组存储器元件。 传入数据包被路由到该组存储器元件中的适当元素。 每组中包括的组数和端口数可以变化,从而允许基于系统架构,半导体技术和其他设计考虑来修改架构。

    LOW COST IMPLEMENTATION FOR A DEVICE UTILIZING LOOK AHEAD CONGESTION MANAGEMENT
    10.
    发明申请
    LOW COST IMPLEMENTATION FOR A DEVICE UTILIZING LOOK AHEAD CONGESTION MANAGEMENT 有权
    使用前瞻性约束管理的设备的低成本实施

    公开(公告)号:US20110044175A1

    公开(公告)日:2011-02-24

    申请号:US12872795

    申请日:2010-08-31

    IPC分类号: H04L12/26

    CPC分类号: H04L47/6205

    摘要: The invention utilizes a separate queue per output port as implemented in the traditional simple queuing schemes of the prior art. Further, it also uses the information found in the packet header to determine the output port and the next output port. Based on this information, it utilizes queues dedicated to congested flows, or “Congested Flow” queues. When the switch determines that, based on the first output port and the second subsequent output port, a packet in the output queue is destined for a congested path, it sets the offending packet aside in a Congested Flow queue, thereby allowing other packets destined for the first output port to continue to be transmitted. In this way, the HOL blocking issue is addressed, without the need for a significantly increased number of output queues.

    摘要翻译: 本发明利用在现有技术的传统简单排队方案中实现的每个输出端口的单独队列。 此外,它还使用分组报头中找到的信息来确定输出端口和下一个输出端口。 基于此信息,它利用专用于拥塞流或“拥塞流”队列的队列。 当交换机确定基于第一输出端口和第二后续输出端口时,输出队列中的数据包将发往拥塞路径,它将违规数据包置于拥塞流队列中,从而允许其他数据包发往 第一个输出端口继续传输。 以这种方式,解决了HOL阻塞问题,而不需要显着增加输出队列数量。