SEPARATOR AND BATTERY
    3.
    发明申请
    SEPARATOR AND BATTERY 审中-公开
    分离器和电池

    公开(公告)号:US20100196750A1

    公开(公告)日:2010-08-05

    申请号:US12697458

    申请日:2010-02-01

    IPC分类号: H01M2/16

    摘要: A separator including a first layer having a first principal surface and a second principal surface and a second layer disposed on at least one of the first principal surface and the second principal surface, wherein the first layer is a microporous film containing a polymer resin, the second layer is a microporous film containing particles having an electrically insulating property and fibrils having an average diameter of 1 μm or less, and the fibrils have a three-dimensional network structure in which the fibrils are mutually linked.

    摘要翻译: 一种分离器,包括具有第一主表面和第二主表面的第一层和设置在第一主表面和第二主表面中的至少一个上的第二层,其中第一层是含有聚合物树脂的微孔膜, 第二层是含有具有电绝缘性的微粒和平均直径为1μm以下的原纤维的微孔膜,原纤维具有原纤维相互连接的三维网状结构。

    Polishing apparatus
    4.
    发明授权
    Polishing apparatus 失效
    抛光设备

    公开(公告)号:US06629883B2

    公开(公告)日:2003-10-07

    申请号:US09855677

    申请日:2001-05-16

    IPC分类号: B24B700

    摘要: A multi-head type polishing apparatus includes a polishing table having a polishing surface, a plurality of top rings for holding workpieces and pressing the workpieces against the polishing surface, and a carousel for supporting the top rings and indexing the top rings. The polishing apparatus further includes a rotary transporter disposed in a position which can be accessed by the top rings, and having a plurality of portions positioned on a predetermined circumference from a center of rotation of the rotary transporter for holding the workpieces. The polishing apparatus also has a pusher for transferring the workpieces between the rotary transporter and the top rings.

    摘要翻译: 多头型抛光装置包括:具有研磨面的研磨台,多个用于保持工件的顶环,将工件压靠在研磨面上;以及转盘,用于支撑顶环,并使顶环分度。 抛光装置还包括设置在可由顶环接近的位置的旋转输送器,并且具有从旋转运送器的旋转中心位于预定圆周上的多个部分,用于保持工件。 抛光装置还具有用于在旋转运送器和顶环之间传送工件的推动器。

    Apparatus and method for converting logical connection information of circuit
    5.
    发明授权
    Apparatus and method for converting logical connection information of circuit 失效
    用于转换电路逻辑连接信息的装置和方法

    公开(公告)号:US06412099B1

    公开(公告)日:2002-06-25

    申请号:US09531832

    申请日:2000-03-21

    申请人: Kazuki Chiba

    发明人: Kazuki Chiba

    IPC分类号: G06F945

    CPC分类号: G06F17/5045

    摘要: Specific sequence circuit element detector 4 detects each sequential circuit element having a clock control terminal connected to an output node of a clock tree synthesis and an output terminal connected, directly or via a combinational circuit element, to one of output terminals designated by output terminal list 3 from logical connection information 1 and logical element library 2. Clock signal replacer 5 replaces the output node of the clock tree synthesis connected to the clock control terminal by an input node of the clock tree synthesis and generates logical connection information 6 logically equivalent to logical connection information 1.

    摘要翻译: 特定序列电路元件检测器4检测具有连接到时钟树合成的输出节点的时钟控制端子的每个时序电路元件和直接或经由组合电路元件连接到由输出端子列表指定的输出端之一的输出端子 时钟信号替换器5通过时钟树合成的输入节点代替连接到时钟控制终端的时钟树合成的输出节点,并产生逻辑上等效于逻辑连接信息的逻辑连接信息6 连接信息1。

    Communication system and its method
    6.
    发明授权
    Communication system and its method 有权
    通信系统及其方法

    公开(公告)号:US08102894B2

    公开(公告)日:2012-01-24

    申请号:US12665322

    申请日:2008-07-15

    IPC分类号: H04B1/00

    CPC分类号: H04B1/7143

    摘要: In a communication system including a plurality of pairs of a transmitting device 2 and a receiving device 3, the transmission performance in the pairs is to be improved. The transmitting device 2-k transmits a transmission signal sk(t) to the receiving device 3-k a plurality of number of times. The receiving device 3-k updates the weight matrix Wk and the hopping pattern Pk used by the FIR filter which performs filtering on the transmission signal rk(t) at a predetermined time interval. The receiving device 3-k transmits the updated hopping pattern Pk to the transmitting device 2-k. The transmitting device 2-k receives the hopping pattern Pk to be used for subsequent spread spectrum.

    摘要翻译: 在包括多对发送装置2和接收装置3的通信系统中,要提高成对的传输性能。 发送装置2-k向发送装置3-k发送多次发送信号sk(t)。 接收装置3-k更新以预定时间间隔对发送信号rk(t)进行滤波的FIR滤波器使用的加权矩阵Wk和跳频图案Pk。 接收装置3-k将更新的跳频图案Pk发送给发送装置2-k。 发送装置2-k接收用于随后的扩频的跳频图案Pk。

    COMMUNICATION SYSTEM AND ITS METHOD
    7.
    发明申请
    COMMUNICATION SYSTEM AND ITS METHOD 有权
    通信系统及其方法

    公开(公告)号:US20100183048A1

    公开(公告)日:2010-07-22

    申请号:US12665322

    申请日:2008-07-15

    IPC分类号: H04B1/69

    CPC分类号: H04B1/7143

    摘要: In a communication system including a plurality of pairs of a transmitting device 2 and a receiving device 3, the transmission performance in the pairs is to be improved. The transmitting device 2-k transmits a transmission signal sk(t) to the receiving device 3-k a plurality of number of times. The receiving device 3-k updates the weight matrix Wk and the hopping pattern Pk used by the FIR filter which performs filtering on the transmission signal rk(t) at a predetermined time interval. The receiving device 3-k transmits the updated hopping pattern Pk to the transmitting device 2-k. The transmitting device 2-k receives the hopping pattern Pk to be used for subsequent spread spectrum.

    摘要翻译: 在包括多对发送装置2和接收装置3的通信系统中,要提高成对的传输性能。 发送装置2-k向发送装置3-k发送多次发送信号sk(t)。 接收装置3-k更新以预定时间间隔对发送信号rk(t)进行滤波的FIR滤波器使用的加权矩阵Wk和跳频图案Pk。 接收装置3-k将更新的跳频图案Pk发送给发送装置2-k。 发送装置2-k接收用于随后的扩频的跳频图案Pk。

    Buffer circuit
    8.
    发明授权
    Buffer circuit 失效
    缓冲电路

    公开(公告)号:US5323063A

    公开(公告)日:1994-06-21

    申请号:US827433

    申请日:1992-01-29

    CPC分类号: H03K5/01 H03K19/01707

    摘要: An n-channel open drain or a p-channel open drain buffer circuit is disclosed. When the input to the buffer circuit changes to a disable state, the circuit once drives the output to the other potential level and then switches the output to a high impedance state. The buffer circuit reduces the period of time necessary for the output thereof to rise (in the case of an n-channel open drain scheme) or to fall (in the case of a p-channel open drain scheme) while making most of the advantages of an open drain configuration.

    摘要翻译: 公开了一种n沟道开路漏极或p沟道开漏缓冲电路。 当缓冲器电路的输入变为禁止状态时,电路一旦将输出驱动到另一个电位,然后将输出切换到高阻态。 缓冲电路减少了其输出上升所需的时间(在n沟道开漏方案的情况下)或降低(在p沟道开漏方案的情况下),同时具有大部分优点 的开漏配置。