摘要:
In an LC-type dielectric filter, an inductor is formed on the uppermost or outermost insulation or dielectric layer and electrically connected at the opposite ends thereof to an upper electrode and a lower electrode which cooperate with a thin film dielectric layer to constitute a capacitor, by means of conductive vias. A method of adjusting a frequency of an LC-type filter is also provided. By the method, an optimum inductance for an inductor is calculated based on a measured capacitance and a desired frequency of the filter, and a pattern of the inductor which is capable of attaining the optimum inductance is selected from a group of predetermined patterns which differ in inductance. The inductor is formed on the outermost dielectric layer in such a manner as to have the selected pattern.
摘要:
In a microstrip line dielectric filter, a principal layer of a conductor constituting a microstrip line circuit consists of a Cu plating layer and the thickness of the conductor is 10 .mu.m or less. In another embodiment, the thickness of the conductor is determined in relation to a center frequency of a wave transmitted through the filter so as to be within the range defined by a hatched area in the graph of FIG. 6.
摘要:
Short circuit between a lead terminal for a negative electrode and a positive electrode can of a coin type cell can be prevented by providing a protuberance for preventing short circuit on a part of the lead terminal for the negative electrode which part is to be positioned over an area where the lead terminal for the negative electrode and the positive electrode can are present adjacent to each other.
摘要:
A multilayer microelectronic circuit to be directly mounted on a substrate and to be used, for example, as a resonator. The multilayer microelectronic circuit comprises a plurality of dielectric layers and patterned electrodes which are laminated one upon another to form a laminated structure, the dielectric layers and the patterned electrodes forming an electrical circuit. The laminated structure has side surfaces extending along a direction in which the dielectric layers and the patterned electrodes are laminated. An input line is formed at one of the side surfaces and connected with an input section of the electrical circuit. An output line is formed at one of the side surfaces and connected with an output section of the electrical circuit. A grounding line is formed at one of the side surfaces and connected with a grounding section of the electrical circuit. Additionally, a signal line formed at one of the side surfaces, for connecting sections of the electrical circuit. The signal line has an end positioned adjacent a mounting surface at which the multilayer microelectronic circuit is directly mounted on the substrate, in which the end of the signal line is separate from the mounting surface so as to be insulated from electrical contact with the substrate.
摘要:
The multilayer microelectronic circuit comprises a main capacitor dielectric layer, a main capacitor first electrode disposed on one of opposite sides of the main capacitor dielectric layer, a main capacitor second electrode disposed on the other of the opposite sides of the main capacitor dielectric layer in a way as to oppose the main capacitor first electrode through the main capacitor dielectric layer, a first trimming capacitor dielectric layer disposed on a side of the main capacitor first electrode opposite to the main capacitor dielectric layer, a first trimming capacitor electrode disposed on a side of the first trimming capacitor dielectric layer opposite to the main capacitor first electrode in a way as to oppose the main capacitor first electrode through the first trimming capacitor dielectric layer, a second trimming capacitor dielectric layer disposed on a side of the first trimming capacitor electrode opposite to the first trimming capacitor dielectric layer, and a second trimming capacitor electrode disposed on a side of the second trimming capacitor dielectric layer opposite to the first trimming capacitor electrode in a way as to oppose the first trimming capacitor electrode through the second trimming capacitor dielectric layer. The first trimming capacitor electrode is first trimmed for rough adjustment of a capacitance of the circuit. The second trimming capacitor electrode is then trimmed for fine adjustment of the capacitance.