Carry circuit suitable for a high-speed arithmetic operation
    3.
    发明授权
    Carry circuit suitable for a high-speed arithmetic operation 失效
    携带电路适用于高速算术运算

    公开(公告)号:US4845655A

    公开(公告)日:1989-07-04

    申请号:US164032

    申请日:1988-03-04

    IPC分类号: G06F7/50 G06F7/507

    CPC分类号: G06F7/507

    摘要: A carry circuit used in an arithmetic unit, such as an adder or a subtractor, has to process a carry operation for producing a carry signal to be transferred to the following carry operation stage according to a carry signal transferred from the previous carry operation stage. To process this carry operation at a high speed, an improved carry circuit performs two operations before the carry signal from the previous stage is received. One of the operations is processed by using a signal representing that the carry signal from the previous stage is present. The other operation is processed by using another signal representing that the carry signal from the previous stage is absent. These two operations have been terminated when the carry signal from the previous stage is received. The carry signal from the previous stage is used to select either one of results of the two operations. Thus, transmission of a carry signal to the following stage can be performed at a high speed.

    Carry circuit suitable for a high-speed arithmetic operation
    6.
    发明授权
    Carry circuit suitable for a high-speed arithmetic operation 失效
    携带电路适用于高速算术运算

    公开(公告)号:US4763295A

    公开(公告)日:1988-08-09

    申请号:US686802

    申请日:1984-12-27

    IPC分类号: G06F7/50 G06F7/507

    CPC分类号: G06F7/507

    摘要: A carry circuit used in an arithmetic unit, such as an adder or a subtractor, has to process a carry operation for producing a carry signal to be transferred to the following carry operation stage according to a carry signal transferred from the previous carry operation stage. To process this carry operation at a high speed, an improved carry circuit performs two operations before the carry signal from the previous stage is received. One of the operations is processed by using a signal representing that the carry signal from the previous stage is present. The other operation is processed by using another signal representing that the carry signal from the previous stage is absent. These two operations have been terminated when the carry signal from the previous stage is received. The carry signal from the previous stage is used to select either one of results of the two operations. Thus, transmission of a carry signal to the following stage can be performed at a high speed.

    摘要翻译: 用于诸如加法器或减法器之类的算术单元中的进位电路必须根据从先前进位操作级传送的进位信号,处理用于产生要传送到后续进位运算级的进位信号的进位运算。 为了高速处理该进位操作,在接收到来自前一级的进位信号之前,改进的进位电路执行两个操作。 通过使用表示来自前一级的进位信号的信号来处理其中一个操作。 通过使用表示来自前一级的进位信号不存在的另一个信号来处理另一个操作。 当接收到来自前一级的进位信号时,这两个操作已被终止。 来自前一级的进位信号用于选择两个操作的结果之一。 因此,可以高速进行进位信号到后一级的传输。