Semiconductor device with a line and method of fabrication thereof
    2.
    发明授权
    Semiconductor device with a line and method of fabrication thereof 有权
    具有线的半导体器件及其制造方法

    公开(公告)号:US08432037B2

    公开(公告)日:2013-04-30

    申请号:US13419053

    申请日:2012-03-13

    IPC分类号: H01L23/48

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。

    Semiconductor device and method for fabricating the same
    3.
    发明授权
    Semiconductor device and method for fabricating the same 失效
    半导体装置及其制造方法

    公开(公告)号:US07564133B2

    公开(公告)日:2009-07-21

    申请号:US11396645

    申请日:2006-04-04

    IPC分类号: H01L23/40

    摘要: A semiconductor device comprises: a lower interconnect formed over a semiconductor substrate; an insulating film formed on the lower interconnect; a via hole penetrating the insulating film to reach the lower interconnect; a first barrier film covering bottom and side surfaces of the via hole; and a metal film filling the via hole covered with the first barrier film. A portion of the first barrier film covering a lower end of the side surface of the via hole is thicker than a portion covering the bottom surface of the via hole.

    摘要翻译: 半导体器件包括:形成在半导体衬底上的下部互连; 形成在下互连上的绝缘膜; 通孔穿过绝缘膜以到达下互连; 覆盖所述通孔的底面和侧面的第一阻挡膜; 以及填充由第一阻挡膜覆盖的通孔的金属膜。 覆盖通孔侧面的下端的第一阻挡膜的一部分比覆盖通孔底面的部分厚。

    Semiconductor device having at least two layers of wirings stacked therein and method of manufacturing the same
    4.
    发明申请
    Semiconductor device having at least two layers of wirings stacked therein and method of manufacturing the same 审中-公开
    具有至少两层布线的半导体装置及其制造方法

    公开(公告)号:US20080197496A1

    公开(公告)日:2008-08-21

    申请号:US12071200

    申请日:2008-02-19

    IPC分类号: H01L23/52 H01L21/4763

    摘要: A semiconductor device according to the present invention is a semiconductor device having a first wiring formed in a first insulating layer and a second wiring formed in a second insulating layer formed on the first insulating layer and the first wiring. Here, at least one of the first wiring and the second wiring is a CuAl wiring. The second wiring is electrically connected to the first wiring at its via-plug portion, with a plurality of barrier layers interposed between the second wiring and the first wiring. In the barrier layers, a CuAl-contact barrier layer which is in contact with the CuAl wiring has a nitrogen atom content of less than 10 atomic %. Therefore, the present semiconductor device has high reliability and small variations in initial via resistance value.

    摘要翻译: 根据本发明的半导体器件是具有形成在第一绝缘层中的第一布线和形成在形成在第一绝缘层和第一布线上的第二绝缘层中的第二布线的半导体器件。 这里,第一布线和第二布线中的至少一个是CuAl布线。 第二布线在其通孔插塞部分与第一布线电连接,多个阻挡层介于第二布线和第一布线之间。 在阻挡层中,与CuAl布线接触的CuAl接触阻挡层的氮原子含量小于10原子%。 因此,本半导体器件具有高可靠性和初始通孔电​​阻值的小变化。

    Semiconductor device and manufacturing method therof
    5.
    发明申请
    Semiconductor device and manufacturing method therof 审中-公开
    半导体器件及制造方法

    公开(公告)号:US20070145591A1

    公开(公告)日:2007-06-28

    申请号:US11646432

    申请日:2006-12-28

    IPC分类号: H01L23/52

    摘要: The semiconductor device manufacturing method includes the steps of: applying a first wire including a barrier metal film, a seed film, and a wiring material film in a first wire trench formed in a first interlayer dielectric film; after a second interlayer dielectric film is formed on the first interlayer dielectric film, forming a via hole and a second wire trench in the second interlayer dielectric film so as to expose the wiring material film; applying a barrier metal film on the semiconductor device; and after the barrier metal film on the wiring material film is removed by using, for example, a re-sputtering process, applying a barrier metal film on the wiring material film. The re-sputtering process can remove an oxide film of impurity metal in the seed film applied on the wiring material film.

    摘要翻译: 半导体器件制造方法包括以下步骤:在形成在第一层间电介质膜中的第一线沟槽中施加包括阻挡金属膜,种子膜和布线材料膜的第一布线; 在第一层间电介质膜上形成第二层间电介质膜之后,在第二层间电介质膜中形成通孔和第二导线沟槽,以露出布线材料膜; 在半导体器件上施加阻挡金属膜; 并且通过使用例如再溅射工艺除去布线材料膜上的阻挡金属膜之后,在布线材料膜上施加阻挡金属膜。 再溅射工艺可以除去施加在布线材料膜上的种子膜中的杂质金属的氧化物膜。

    Semiconductor device with a line and method of fabrication thereof
    6.
    发明授权
    Semiconductor device with a line and method of fabrication thereof 有权
    具有线的半导体器件及其制造方法

    公开(公告)号:US07192871B2

    公开(公告)日:2007-03-20

    申请号:US11148307

    申请日:2005-06-09

    IPC分类号: H01L21/311

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。

    Semiconductor device with a line and method of fabrication thereof
    8.
    发明授权
    Semiconductor device with a line and method of fabrication thereof 有权
    具有线的半导体器件及其制造方法

    公开(公告)号:US07709388B2

    公开(公告)日:2010-05-04

    申请号:US11676962

    申请日:2007-02-20

    IPC分类号: H01L21/311

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。

    Semiconductor device with a line and method of fabrication thereof
    9.
    发明申请
    Semiconductor device with a line and method of fabrication thereof 有权
    具有线的半导体器件及其制造方法

    公开(公告)号:US20050275110A1

    公开(公告)日:2005-12-15

    申请号:US11148307

    申请日:2005-06-09

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。

    Semiconductor device with a line and method of fabrication thereof
    10.
    发明授权
    Semiconductor device with a line and method of fabrication thereof 失效
    具有线的半导体器件及其制造方法

    公开(公告)号:US08222146B2

    公开(公告)日:2012-07-17

    申请号:US13052712

    申请日:2011-03-21

    IPC分类号: H01L21/311

    摘要: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

    摘要翻译: 半导体器件包括层间绝缘膜,设置在层间绝缘膜中的底层线,覆盖层间绝缘膜的衬里膜,覆盖衬垫膜的层间绝缘膜。 底线具有较低的孔,衬里膜和层间绝缘膜具有与下孔连通的上孔,下孔的直径大于上孔。 半导体器件还包括设置在下孔内壁表面的导电膜,沿着上孔的内壁表面设置的阻挡金属和填充上孔和下孔的Cu膜。 导电膜含有与阻挡金属物质相同的物质。 因此可以获得高可靠性的半导体器件。