摘要:
Disclosed herein is a device that includes a plurality of memory circuits and a refresh control circuit configured to generate a plurality of refresh initiation signals such that one of the refresh initiation signals takes an active level. Each of the memory circuits comprises a memory cell array including a plurality of memory cells, at least one data terminal, a data read/write circuit performing a data read operation to read out read-data from a selected one of the memory cells and supply the read-data to the data terminal and a data write operation to receive write-data from the data terminal and write the write-data into a selected one of the memory cells, and a refresh circuit performing a data refresh operation on selected one or ones of the memory cells of the memory cell array in response to an associated one of the refresh initiation signals taking the active level.
摘要:
Disclosed herein is a device that includes a plurality of memory circuits and a refresh control circuit configured to generate a plurality of refresh initiation signals such that one of the refresh initiation signals takes an active level. Each of the memory circuits comprises a memory cell array including a plurality of memory cells, at least one data terminal, a data read/write circuit performing a data read operation to read out read-data from a selected one of the memory cells and supply the read-data to the data terminal and a data write operation to receive write-data from the data terminal and write the write-data into a selected one of the memory cells, and a refresh circuit performing a data refresh operation on selected one or ones of the memory cells of the memory cell array in response to an associated one of the refresh initiation signals taking the active level.
摘要:
A device includes a control circuit that triggers a first operation every time a specific signal is supplied thereto, and that triggers a second operation in place of the first operation in response to the first specific signal supplied after the number of the first operation performed has reached a predetermined number.
摘要:
A system including a controller and a memory chip. The controller includes first and second selection signal terminals supplying first and second selection signals, respectively, multiple first data terminals and multiple second data terminals. The memory chip includes a semiconductor substrate, third and fourth selection signal terminals provided on the semiconductor substrate and electrically coupled to the first and second selection signal terminals of the controller, respectively. Multiple third data terminals are provided on the semiconductor substrate and electrically coupled to the first data terminals of the controller, respectively. Multiple fourth data terminals are provided on the semiconductor substrate and electrically coupled to the second data terminals of the controller, respectively. The first and third data terminals communicate first data in response to the first selection signal. The second and fourth data terminals communicate second data in response to the second selection signal.
摘要:
An additive for a sodium ion secondary battery of the present invention includes a compound of at least one of a saturated cyclic carbonate having a fluoro group and a chain carbonate having a fluoro group. A sodium ion secondary battery (1) of the present invention includes: a non-aqueous electrolytic solution including the additive for a sodium ion secondary battery and a non-aqueous solvent containing a saturated cyclic carbonate or a non-aqueous solvent containing a saturated cyclic carbonate and a chain carbonate; a positive electrode (11); and a negative electrode (12) that includes a coating formed in a surface of the negative electrode, the coating containing a composite material having carbon, oxygen, fluorine and sodium in the surface and includes a negative-electrode active material containing a hard carbon.
摘要:
To include first and second data input/output terminals allocated to first and second memory circuit units, respectively, and an address terminal allocated in common to these memory circuit units. When a first chip selection signal is activated, the first memory circuit unit performs a read operation or a write operation via the first data input/output terminal based on an address signal regardless of an operation of the second memory circuit unit. When a second chip selection signal is activated, the second memory circuit unit performs a read operation or a write operation via the second data input/output terminal based on the address signal regardless of an operation of the first memory circuit unit. With this configuration, a wasteful data transfer can be prevented, and the effective data transfer rate can be increased.
摘要:
A device includes a control circuit that triggers a first operation every time a specific signal is supplied thereto, and that triggers a second operation in place of the first operation in response to the first specific signal supplied after the number of the first operation performed has reached a predetermined number.
摘要:
A signal transmission circuit includes first and second power source wirings, and a plurality of differential circuits connected in series between the first and second power source wirings. A signal transmission system includes a plurality of pairs of signal wirings, an output circuit supplying a differential signal to each of the pairs of signal wirings, and an input circuit receiving the differential signals via the pairs of signal wirings, wherein the output circuit includes first and second power source wirings, and a plurality of differential output circuits connected in series between the first and second power source wirings, and the input circuit includes a plurality of differential input circuits respectively corresponding to the differential output circuits.
摘要:
In a fuel injection valve used for an internal combustion engine, a valve closing lag time due to fluid resistance in a fuel path is shortened to decrease a minimum injection limit. More specifically, in the fuel injection valve in which an anchor is attracted to an end face part of a stationary core having a fuel path formed at a center part thereof by means of electromagnetic force, and in which a fuel injection hole is opened and closed by controlling a valve disc driven in conjunction with the anchor, there are provided a fuel reservoir part at a center part of an upper end face part of the anchor, a through hole extending axially in a fashion that an end part thereof is open to the fuel reservoir part, and a fuel path extending radially outward from the fuel reservoir part so that fuel is fed to a magnetic attraction gap between an upper end face part of the anchor and a lower end face part of the stationary core. Further, an opening part of a through hole that is open to an upper end face part of the anchor is at least partially opposed to a fuel introduction bore formed in the stationary core, and on the opening part of the through hole, a fuel introduction part is provided for capturing fuel running radially outward from a center side part of the anchor and for guiding the fuel thus captured to the through hole.
摘要:
In relation to injectors used for internal-combustion engines, it is important to decrease valve closing delay time and also the minimum injection quantity, while these are affected by remanent magnetism in the fixed core, surface tension of the fuel, etc. With reference to a fuel injection valve with a pipe-shaped member to enclose a fixed core and a movable part and further with coils and yokes to cover up the above pipe-shaped member, the anchor to drive the movable member has a plurality of through holes for fuel passage extending in the axial direction, while these through holes are arranged at a certain intervals in the circumferential direction, and projections formed to constitute a contacting surface to touch the fixed core arranged randomly in between the through holes.