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144 条记录 (耗时 0.027 秒)

    Semiconductor device with aligned bumps
    2.
    发明授权
    Semiconductor device with aligned bumps 有权
    具有对准凸块的半导体器件

    公开(公告)号：US09018969B2

    公开(公告)日：2015-04-28

    申请号：US13608138

    申请日：2012-09-10

    申请人： Toru Ishikawa ,  Machio Segawa

    发明人： Toru Ishikawa ,  Machio Segawa

    IPC分类号： G01R31/26 ,  H01L23/48 ,  G11C29/02 ,  H01L25/065

    CPC分类号： G11C29/025 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2924/13091 ,  H01L2924/00

    摘要： In a semiconductor device in which semiconductor chips having a number of signal TSVs are stacked, a huge amount of man-hours have been required to perform a continuity test for each of the signal TSVs. According to the present invention, no continuity test is performed directly on signal TSVs. Dummy bumps are arranged in addition to signal TSVs. The dummy bumps of the semiconductor chips are connected through a conduction path that can pass the dummy bumps between the semiconductor chips with one stroke when the semiconductor chips are stacked. A continuity test of the conduction path allows a bonding defect on bonded surfaces of two of the stacked semiconductor chips to be measured and detected.

    摘要翻译： 在其中堆叠具有多个信号TSV的半导体芯片的半导体器件中，需要大量的工时来对每个信号TSV执行连续性测试。 根据本发明，直接对信号TSV进行连续性测试。 除了信号TSV之外还布置了虚设的凸块。 当半导体芯片堆叠时，半导体芯片的虚设凸起通过导电路径连接，导电路径能够使半导体芯片之间的虚设凸块通过一行。 传导路径的连续性测试允许测量和检测两个堆叠半导体芯片的接合表面上的接合缺陷。

    Memory System and Control Method Therefor
    3.
    发明申请
    Memory System and Control Method Therefor 有权
    内存系统及其控制方法

    公开(公告)号：US20140286107A1

    公开(公告)日：2014-09-25

    申请号：US14295707

    申请日：2014-06-04

    申请人： Toru Ishikawa

    发明人： Toru Ishikawa

    IPC分类号： G11C7/22

    CPC分类号： G11C7/10 ,  G11C5/02 ,  G11C5/06 ,  G11C7/1066 ,  G11C7/22

    摘要： A memory system includes a plurality of memory devices having data terminals that are commonly connected to a memory controller. Each of the memory devices includes a data output circuit that outputs read data that is read from a memory cell array in response to a read command to the data terminal, and an output-timing adjustment circuit that adjusts an output timing of read data that is output from the data output circuit. The memory controller sets an adjustment amount of adjustment performed by an output-timing adjustment circuit such that delay times from when the read command is issued until when the read data is received match in the memory devices, by issuing a setting command to each of the memory devices.

    摘要翻译： 存储器系统包括具有共同连接到存储器控制器的数据端的多个存储器件。 每个存储器件包括数据输出电路，该数据输出电路响应于对数据端子的读取命令而输出从存储器单元阵列读取的读取数据;以及输出定时调整电路，其调整读取数据的输出定时， 从数据输出电路输出。 存储器控制器设置由输出定时调整电路执行的调整调整量，使得从读取命令发出到接收到读取数据的延迟时间在存储器件中匹配时，通过向每个 存储设备。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140269108A1

    公开(公告)日：2014-09-18

    申请号：US14288428

    申请日：2014-05-28

    申请人： Toru ISHIKAWA

    发明人： Toru ISHIKAWA

    IPC分类号： G11C7/10

    CPC分类号： G11C7/1057 ,  G01R31/2884 ,  G11C5/04 ,  G11C7/1051 ,  G11C29/1201 ,  G11C29/48 ,  H01L22/34 ,  H01L23/481 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311

    摘要： A device includes a semiconductor substrate, a first penetrating electrode penetrating through the semiconductor substrate, a first test pad, and a first tri-state buffer coupled between the first penetrating electrode and the first test pad. The first tri-state buffer receives a buffer control signal at a control terminal thereof. The device further includes a buffer control circuit supplying the buffer control signal to the first tri-state buffer.

    摘要翻译： 一种器件包括半导体衬底，穿透半导体衬底的第一穿透电极，第一测试焊盘和耦合在第一穿透电极和第一测试焊盘之间的第一三态缓冲器。 第一三态缓冲器在其控制端接收缓冲器控制信号。 该装置还包括向第一三态缓冲器提供缓冲器控制信号的缓冲器控制电路。

    Semiconductor device with buffer and replica circuits
    5.
    发明授权
    Semiconductor device with buffer and replica circuits 有权

    公开(公告)号：US08547138B2

    公开(公告)日：2013-10-01

    申请号：US12969030

    申请日：2010-12-15

    申请人： Toru Hatakeyama ,  Toru Ishikawa

    发明人： Toru Hatakeyama ,  Toru Ishikawa

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/0027 ,  G11C5/06 ,  G11C7/1087

    摘要： A semiconductor device includes a first input buffer adjusting a logic threshold voltage, a first replica circuit, a first reference voltage generating circuit, and a first comparator circuit. The first replica circuit is identical in circuit configuration to the first input buffer. The first replica circuit has an input and an output connected to the input. The first replica circuit generates the logic threshold voltage as an output voltage. The first reference voltage generating circuit generates a first reference voltage. The first comparator circuit compares the logic threshold voltage as an output voltage of the first replica circuit to the first reference voltage to generate a first threshold adjustment signal. The first comparator circuit supplies the first threshold adjustment signal to the first input buffer and the first replica circuit. The first threshold adjustment signal allows the first input buffer to adjust the logic threshold voltage.

    Memory system and control method therefor
    6.
    发明授权
    Memory system and control method therefor 有权

    公开(公告)号：US08514635B2

    公开(公告)日：2013-08-20

    申请号：US13155657

    申请日：2011-06-08

    申请人： Toru Ishikawa

    发明人： Toru Ishikawa

    IPC分类号： G11C7/10

    CPC分类号： G11C7/10 ,  G11C5/02 ,  G11C5/06 ,  G11C7/1066 ,  G11C7/22

    摘要： A memory system includes a plurality of memory devices having data terminals that are commonly connected to a memory controller. Each of the memory devices includes a data output circuit that outputs read data that is read from a memory cell array in response to a read command to the data terminal, and an output-timing adjustment circuit that adjusts an output timing of read data that is output from the data output circuit. The memory controller sets an adjustment amount of adjustment performed by an output-timing adjustment circuit such that delay times from when the read command is issued until when the read data is received match in the memory devices, by issuing a setting command to each of the memory devices.

    Electromagnetic Fuel Injection Valve
    7.
    发明申请
    Electromagnetic Fuel Injection Valve 有权
    电磁燃油喷射阀

    公开(公告)号：US20130087639A1

    公开(公告)日：2013-04-11

    申请号：US13638382

    申请日：2011-04-01

    申请人： Hirotaka Nakai ,  Motoyuki Abe ,  Toru Ishikawa ,  Yasuo Namaizawa ,  Nobuaki Kobayashi ,  Kiyoshi Yoshii ,  Hitoshi Furudate

    发明人： Hirotaka Nakai ,  Motoyuki Abe ,  Toru Ishikawa ,  Yasuo Namaizawa ,  Nobuaki Kobayashi ,  Kiyoshi Yoshii ,  Hitoshi Furudate

    IPC分类号： F02M51/06

    CPC分类号： F02M51/061 ,  F02M51/0671 ,  F02M51/0685 ,  F02M61/20 ,  F02M2200/306

    摘要： An electromagnetic fuel injection valve includes: a valve element which closes a fuel passage by coming into contact with a valve seat and opens the fuel passage by going away from the valve seat; an electromagnet which includes a coil and a magnetic core formed as a drive portion for driving the valve element; a movable element which is held by the valve element in a state where the movable element is displaceable in the direction of a drive force of the valve element relative to the valve element; a first biasing portion for biasing the valve element in the direction opposite to the direction of a drive force generated by the drive portion; a second biasing portion for biasing the movable element in the direction of the drive force with a biasing force smaller than the biasing force generated by the first biasing portion; and a restricting portion for restricting the displacement of the movable element in the direction of the drive force relative to the valve element.

    摘要翻译： 电磁燃料喷射阀包括：阀元件，其通过与阀座接触并关闭燃料通道并通过远离阀座打开燃料通道; 电磁体，其包括形成为驱动阀元件的驱动部的线圈和磁芯; 可移动元件，其在所述可移动元件可相对于所述阀元件的驱动力相对于所述阀元件的方向移动的状态下被所述阀元件保持; 第一偏压部分，用于沿与驱动部分产生的驱动力的方向相反的方向偏压阀元件; 第二偏置部分，用于利用小于由第一偏压部分产生的偏压力的偏压力来使驱动力方向偏压可动元件; 以及用于限制可动元件相对于阀元件的驱动力方向的位移的限制部。

    SEMICONDUCTOR DEVICE HAVING CHIP CRACK DETECTION STRUCTURE
    8.
    发明申请
    SEMICONDUCTOR DEVICE HAVING CHIP CRACK DETECTION STRUCTURE 有权
    具有芯片检测结构的半导体器件

    公开(公告)号：US20120292759A1

    公开(公告)日：2012-11-22

    申请号：US13461627

    申请日：2012-05-01

    申请人： Toru ISHIKAWA

    发明人： Toru ISHIKAWA

    IPC分类号： H01L23/498

    CPC分类号： H01L22/32 ,  H01L22/34 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/15311

    摘要： A device includes a semiconductor substrate, a first penetration electrode and a plurality of second penetration electrodes each penetrating the semiconductor substrate, a first terminal and a plurality of second terminals formed on a one side of the substrate, and a third terminal and a plurality of fourth terminals formed on an opposite side of the substrate. Each of the first and third terminals is vertically aligned with and electrically connected to first penetration electrode. Each of the second terminals is vertically aligned with an associated one of the second penetration electrodes and electrically connected to another one of the second penetration terminals that is not vertically aligned with the associated second terminal. Each of fourth terminals is vertically aligned with and electrically connected to an associated one of the second penetration electrodes.

    摘要翻译： 一种器件包括半导体衬底，第一穿透电极和穿过半导体衬底的多个第二穿透电极，形成在衬底的一侧上的第一端子和多个第二端子，以及第三端子和多个 第四端子形成在基板的相对侧上。 第一和第三端子中的每一个与第一穿透电极垂直对准并电连接。 每个第二端子与第二穿透电极中的相关联的一个垂直对准，并且电连接到不与相关联的第二端子垂直对准的另一个第二穿透端子。 第四端子中的每一个与第二穿透电极中的相关联的一个垂直对准并电连接。

    Fuel injection valve
    9.
    发明授权
    Fuel injection valve 有权
    燃油喷射阀

    公开(公告)号：US08230839B2

    公开(公告)日：2012-07-31

    申请号：US12438668

    申请日：2006-09-25

    申请人： Masahiko Hayatani ,  Motoyuki Abe ,  Toru Ishikawa ,  Eiichi Kubota ,  Takehiko Kowatari

    发明人： Masahiko Hayatani ,  Motoyuki Abe ,  Toru Ishikawa ,  Eiichi Kubota ,  Takehiko Kowatari

    IPC分类号： F02M51/00

    CPC分类号： F02M51/0671 ,  F02M51/0685 ,  F02M2200/07 ,  F02M2200/304

    摘要： In a fuel injection valve used for an internal combustion engine, a valve closing lag time due to fluid resistance in a fuel path is shortened to decrease a minimum injection limit. More specifically, in the fuel injection valve in which an anchor is attracted to an end face part of a stationary core having a fuel path formed at a center part thereof by means of electromagnetic force, and in which a fuel injection hole is opened and closed by controlling a valve disc driven in conjunction with the anchor, there are provided a fuel reservoir part at a center part of an upper end face part of the anchor, a through hole extending axially in a fashion that an end part thereof is open to the fuel reservoir part, and a fuel path extending radially outward from the fuel reservoir part so that fuel is fed to a magnetic attraction gap between an upper end face part of the anchor and a lower end face part of the stationary core. Further, an opening part of a through hole that is open to an upper end face part of the anchor is at least partially opposed to a fuel introduction bore formed in the stationary core, and on the opening part of the through hole, a fuel introduction part is provided for capturing fuel running radially outward from a center side part of the anchor and for guiding the fuel thus captured to the through hole.

    摘要翻译： 在用于内燃机的燃料喷射阀中，由于燃料路径中的流体阻力引起的关闭滞后时间被缩短以减小最小喷射极限。 更具体地说，在燃料喷射阀中，锚具被吸引到具有通过电磁力形成在其中心部分处的燃料路径的固定铁芯的端面部分，并且其中燃料喷射孔被打开和关闭 通过控制与锚固件一起驱动的阀盘，在锚固件的上端面部分的中心部分设置有一个燃料储存部分，一个轴向延伸的通孔，该通孔的端部向 燃料储存部分和从燃料储存部分径向向外延伸的燃料路径，使得燃料被供给到锚固件的上端面部分和固定铁芯的下端面部分之间的磁吸引间隙。 此外，通向孔的上端面部分开口的通孔的开口部分至少部分地与形成在固定铁芯中的燃料导入孔相对，并且在通孔的开口部分上具有燃料引入 设置有用于捕获从锚的中心侧径向向外延伸的燃料并且将如此捕获的燃料引导到通孔。