-
公开(公告)号：US07027318B2
公开(公告)日：2006-04-11
申请号：US10449572
申请日：2003-05-30
IPC分类号： G11C11/00
CPC分类号： G11C5/147
摘要： A method and apparatus are disclosed for adjusting the offset voltage of a circuit. In one embodiment, the method comprises: supplying reference and supply voltages to the circuit, controlling a voltage across a memory element to be approximately equal to the reference voltage, comparing the current through the memory element to a predetermined value, and adjusting an offset voltage of the circuit, where the offset may remain substantially constant despite changes in the supply voltage.
摘要翻译： 公开了一种用于调整电路的偏移电压的方法和装置。 在一个实施例中，该方法包括：向电路提供参考电压和电源电压，将存储元件两端的电压控制为近似等于参考电压，将通过存储元件的电流与预定值进行比较，并调整偏移电压 的电路，其中尽管电源电压发生变化，但是偏移可能保持基本恒定。
-
2.发明授权System for and method of accessing a four-conductor magnetic random access memory 有权访问四导体磁性随机存取存储器的系统和方法公开(公告)号：US06839270B2
公开(公告)日：2005-01-04
申请号：US10346494
申请日：2003-01-17
CPC分类号： G11C11/16
摘要： A control circuit for writing to and reading from MRAMs comprising a row decoder; a first read/write row driver connected to the row decoder; a plurality of global row write conductors connected to the first read/write row driver; a plurality of row taps connected to each of the global row write conductors; and a second read/write row driver connected to the global row write conductors.
-
公开(公告)号：US06751147B1
公开(公告)日：2004-06-15
申请号：US10635399
申请日：2003-08-05
IPC分类号： G11C1115
CPC分类号： G11C11/15
摘要： A method of adaptively writing magnetic memory cells of a MRAM is disclosed according to an embodiment of the present invention. The method comprises providing a logical data block of a memory array having magnetic memory cells, each magnetic memory cell in a known initial state and each magnetic memory cell configured along an easy-axis magnetic field generating conductor and writing to the magnetic memory cells using a predefined minimum current level. The method may further comprise sensing the magnetic memory cells to determine if data has been successfully written, incrementing the current level if writing was unsuccessful and repeating above.
摘要翻译： 根据本发明的实施例公开了一种自适应地写入MRAM的磁存储单元的方法。 该方法包括提供具有磁存储单元的存储器阵列的逻辑数据块，具有已知初始状态的每个磁存储单元和沿着易轴磁场产生导体配置的每个磁存储单元，并使用 预定义的最小电流电平。 该方法还可以包括感测磁存储器单元以确定数据是否已被成功写入，如果写入不成功并在上面重复，则递增当前电平。
-
公开(公告)号：US06958933B2
公开(公告)日：2005-10-25
申请号：US10784514
申请日：2004-02-23
CPC分类号： G11C11/15
摘要： A data storage device comprising a first memory cell string that includes at least a first magnetic random access memory (MRAM) cell coupled to a second MRAM cell and a circuit coupled to a node between the first MRAM cell and the second MRAM cell is provided. The circuit is configured to detect a voltage change at the node in response to a voltage being provided to the memory cell string and in response to a write sense current being applied across the first MRAM cell.
摘要翻译： 一种包括第一存储器单元串的数据存储设备，其包括至少耦合到第二MRAM单元的第一磁随机存取存储器（MRAM）单元和耦合到第一MRAM单元和第二MRAM单元之间的节点的电路。 电路被配置为响应于提供给存储器单元串的电压以及响应于跨第一MRAM单元施加的写入感测电流来检测节点处的电压变化。
-
公开(公告)号：US06947313B2
公开(公告)日：2005-09-20
申请号：US10649076
申请日：2003-08-27
IPC分类号： G11C11/15 , H01L21/8246 , H01L27/105 , H01L43/08 , G11C11/00
CPC分类号： G11C11/15
摘要： Method and apparatus for coupling conductors in magnetic memory. In some embodiments, the memory element comprises: a first magnetic memory element, a first group of conductors magnetically coupled to the first magnetic memory element, a second magnetic memory element, a second group of conductors magnetically coupled to the second magnetic memory element, where the second magnetic memory element is substantially vertical to the first, and the first and second group of conductors have at least one conductor in common.
摘要翻译： 在磁存储器中耦合导体的方法和装置。 在一些实施例中，存储元件包括：第一磁存储元件，磁耦合到第一磁存储元件的第一组导体，第二磁存储元件，与第二磁存储器元件磁耦合的第二组导体， 第二磁存储元件基本上垂直于第一磁存储元件，并且第一和第二组导体具有至少一个共同的导体。
-
公开(公告)号：US06901005B2
公开(公告)日：2005-05-31
申请号：US10649752
申请日：2003-08-27
IPC分类号： G11C11/15 , H01L21/8246 , H01L27/105 , H01L43/08 , G11C11/22
CPC分类号： G11C11/15
摘要： Methods and apparatuses are disclosed for reducing the read time of a memory array. In one embodiment, the method includes sampling unknown data values from a plurality of memory elements, buffering the unknown values, writing known values to the plurality of memory elements and sampling the known values, and comparing the known values to the buffered values.
摘要翻译： 公开了用于减少存储器阵列的读取时间的方法和装置。 在一个实施例中，该方法包括从多个存储器元件采样未知数据值，缓冲未知值，将已知值写入多个存储器元件并对已知值进行采样，以及将已知值与缓冲值进行比较。
-
公开(公告)号：US07913130B2
公开(公告)日：2011-03-22
申请号：US10698896
申请日：2003-10-31
CPC分类号： G11C29/02 , G11C29/026
摘要： A data storage device includes non-volatile memory; and a read circuit for performing multi-sample read operations on the memory during a normal mode of operation. The read circuit includes a digital counter having an output that indicates a single bit (e.g., a sign-bit). The read circuit allows an external device (e.g., a memory tester) to supply test clock pulses to an input of the digital counter during a test mode. The test clock pulses can be counted to determine a state of the digital counter.
摘要翻译： 数据存储装置包括非易失性存储器; 以及用于在正常操作模式期间对存储器执行多样本读取操作的读取电路。 读取电路包括具有指示单个位（例如，符号位）的输出的数字计数器。 读取电路允许外部设备（例如，存储器测试器）在测试模式期间将测试时钟脉冲提供给数字计数器的输入。 可以对测试时钟脉冲进行计数，以确定数字计数器的状态。
-
公开(公告)号：US07221582B2
公开(公告)日：2007-05-22
申请号：US10649078
申请日：2003-08-27
IPC分类号： G11C11/00
摘要： Methods and apparatuses are disclosed for controlling the write current in magnetic memory. In some embodiments, the method includes: providing a current in a plurality of memory write lines (where the write lines may be magnetically coupled to at least one memory element), coupling a first and second plurality of transistors to either end of the memory write line, and altering the conduction state of individual transistors within the first and second plurality of transistors.
摘要翻译： 公开了用于控制磁存储器中的写入电流的方法和装置。 在一些实施例中，该方法包括：在多个存储器写入线（其中写入线可以磁耦合到至少一个存储器元件）上提供电流，将第一和第二多个晶体管耦合到存储器写入的任一端 并且改变第一和第二多个晶体管内的各个晶体管的导通状态。
-
9.发明授权Method, apparatus and system for erasing and writing a magnetic random access memory 有权用于擦除和写入磁性随机存取存储器的方法，装置和系统公开(公告)号：US06826086B1
公开(公告)日：2004-11-30
申请号：US10635405
申请日：2003-08-05
IPC分类号： G11C1604
CPC分类号： G11C11/15
摘要： A method of erasing a logical data block of a MRAM according to an embodiment of the present invention is disclosed. The method comprises providing a MRAM having a logical data block configured for a distribution of selected and unselected write field thresholds when switching from a logical one state to a logical zero state, wherein the selected write field threshold is separated from the unselected write field threshold by a preselected amount and writing all bits of the logical data block to the logical zero state.
摘要翻译： 公开了根据本发明的实施例的擦除MRAM的逻辑数据块的方法。 该方法包括提供具有逻辑数据块的MRAM，该逻辑数据块被配置用于在从逻辑1状态切换到逻辑零状态时分配所选择的和未选择的写入域阈值，其中所选择的写入域阈值与未选择的写入域阈值相分离 预选量并将逻辑数据块的所有位写入逻辑零状态。
-
公开(公告)号：US07277319B2
公开(公告)日：2007-10-02
申请号：US11252143
申请日：2005-10-17
IPC分类号： G11C11/00
摘要： A method of performing a read operation from a first magnetic random access memory (MRAM) cell in a memory cell string that includes the first MRAM cell coupled to a second MRAM cell. The method includes providing a voltage to a first end of the first memory cell string that is closest to the first MRAM cell, providing a ground source to a second end of the first memory cell string that is opposite the first end, and determining whether a voltage change occurred at a node between the first and second MRAM cells in response to applying a write sense current to the first MRAM cell.
摘要翻译： 一种从包括耦合到第二MRAM单元的第一MRAM单元的存储单元串中的第一磁随机存取存储器（MRAM）单元执行读操作的方法。 该方法包括向最接近第一MRAM单元的第一存储单元串提供电压，向第一存储单元串提供与第一端相对的第二端的接地源，以及确定是否 响应于向第一MRAM单元施加写检测电流，在第一和第二MRAM单元之间的节点处发生电压变化。
-
-
-
-
-
-
-
-
-
搜索结果
60 条记录 (耗时 0.022 秒)
