公开(公告)号：US07267997B1

公开(公告)日：2007-09-11

申请号：US11118828

申请日：2005-04-29

Applicant: Manish Sharma ,  Lung Tran

Inventor： Manish Sharma ,  Lung Tran

IPC: H01L21/00

CPC classification number: H01L43/12 ,  B82Y25/00 ,  H01F10/3254 ,  H01F10/3281 ,  H01F41/32

Abstract: An exemplary method for making a memory structure comprises forming a first ferromagnetic layer, forming a spacer layer above the first ferromagnetic layer, forming a second ferromagnetic layer above the spacer layer by applying a first deposition process to form a thin layer of ferromagnetic material substantially covering the spacer layer, the first layer being formed at a first energy level, and applying a second deposition process to form the remainder of the second ferromagnetic layer above the thin layer of ferromagnetic material, the second ferromagnetic layer being formed at a second energy level, higher than the first energy level. This way, the spacer layer is protected by the thin layer during the second energy level deposition.

Abstract translation: 用于制造存储器结构的示例性方法包括形成第一铁磁层，在第一铁磁层之上形成间隔层，通过施加第一沉积工艺形成基本覆盖的铁磁材料的薄层，在间隔层上方形成第二铁磁层 所述间隔层，所述第一层以第一能级形成，并且施加第二沉积工艺以在所述铁磁材料的薄层之上形成所述第二铁磁层的其余部分，所述第二铁磁层形成在第二能级， 高于第一能级。 这样，间隔层在第二能级沉积期间被薄层保护。

公开(公告)号：US20070115718A1

公开(公告)日：2007-05-24

申请号：US11285991

申请日：2005-11-23

Applicant: Manish Sharma ,  Lung Tran ,  Thomas Anthony

Inventor： Manish Sharma ,  Lung Tran ,  Thomas Anthony

IPC: G11C11/14

CPC classification number: G11C11/15 ,  H01L27/222 ,  H01L43/08

Abstract: An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic separating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic separating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.

Abstract translation: 包括多个存储器单元的示例性存储器阵列，每个存储器单元包括第一铁磁层，通过非磁性分离层与第一铁磁层隔开的第二铁磁层，并且通过非磁性分离层磁耦合到第一铁磁层，并通过 来自第一铁磁层的去磁场，第二铁磁层上方的间隔层，以及间隔层上方的基准层。 第一铁磁层，非磁性分离层和第二铁磁层组合起来作为存储单元的数据层。

公开(公告)号：US07196957B2

公开(公告)日：2007-03-27

申请号：US11105054

申请日：2005-04-13

Applicant: Lung Tran ,  Thomas C. Anthony

Inventor： Lung Tran ,  Thomas C. Anthony

IPC: G11C7/04

CPC classification number: G11C11/16 ,  G11C11/1675

Abstract: The invention includes a stacked magnetic memory structure. The magnetic memory structure includes a stacked magnetic memory structure. The first layer includes a first plurality of magnetic tunnel junctions. A second layer is formed adjacent to the first layer. The second layer includes a second plurality of magnetic tunnel junctions. The stacked magnetic memory structure further includes a common first group conductor connected to each of the first plurality of magnetic tunnel junctions and the second plurality of magnetic tunnel junctions.

Abstract translation: 本发明包括堆叠磁存储器结构。 磁存储器结构包括堆叠磁存储器结构。 第一层包括第一多个磁性隧道结。 形成与第一层相邻的第二层。 第二层包括第二多个磁性隧道结。 层叠的磁存储器结构还包括连接到第一多个磁隧道结中的每一个和第二多个磁性隧道结的公共第一组导体。

公开(公告)号：US20060215444A1

公开(公告)日：2006-09-28

申请号：US11089688

申请日：2005-03-24

Applicant: Frederick Perner ,  Janice Nickel ,  Lung Tran

Inventor： Frederick Perner ,  Janice Nickel ,  Lung Tran

IPC: G11C11/00

CPC classification number: G11C11/16 ,  G11C11/1675

Abstract: An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.

Abstract translation: 提供信息存储装置。 信息存储装置可以是包括自旋相关隧道（SDT）结或磁存储元件的电阻交叉点阵列的磁性随机存取存储器（MRAM）装置，其中字线沿着沿着SDT结的行和沿着 SDT路口的列。 本设计包括与相关联的磁存储元件串联连接的多个加热元件，每个加热元件包括二极管。 施加到磁存储元件和相关联的加热元件的电压导致反向电流流过二极管，从而从二极管产生热量并加热磁存储元件，从而有助于器件的写入功能。

公开(公告)号：US20060072944A1

公开(公告)日：2006-04-06

申请号：US10958007

申请日：2004-10-04

Applicant: Manish Sharma ,  Lung Tran

Inventor： Manish Sharma ,  Lung Tran

IPC: G03G15/16

CPC classification number: H04L45/00 ,  G03G15/10 ,  G03G15/224 ,  G03G15/225 ,  G03G15/6585 ,  H04L45/24 ,  H04L45/245 ,  H04L45/60 ,  H05K3/1266 ,  H05K3/207 ,  H05K2201/0257 ,  H05K2203/0126 ,  H05K2203/0517 ,  Y02D50/30

Abstract: The invention provides a printed circuit board (PCB) printing system. In a particular embodiment, the system includes a liquid electrophotographic printing device. At least one supplier of electrically conductive ink supplying electrically conductive ink to the electrophotographic printing device is also provided. In addition, at least one supplier of dielectric ink supplying dielectric ink to the electrophotographic printing device is also provided. The liquid electrophotographic printing device is operable to apply the electrically conductive ink and the dielectric ink to a provided substrate such that substantially immiscible boundary delineation occurs at any points of contact between the applied electrically conducive ink and the applied dielectric ink. An appropriate method of use for the rendering of a printed circuit board is also provided.

公开(公告)号：US07002820B2

公开(公告)日：2006-02-21

申请号：US10871761

申请日：2004-06-17

Applicant: Zhizhang Chen ,  Mark David Johnson ,  Lung Tran

Inventor： Zhizhang Chen ,  Mark David Johnson ,  Lung Tran

IPC: G11C19/08

CPC classification number: G11B9/1409 ,  G11B9/00 ,  G11B9/04 ,  G11B9/14 ,  G11B9/1427 ,  Y10S977/943

Abstract: A semiconductor storage device including a tip electrode, a media electrode and a storage media. The storage media has a storage area configurable to be in one of a plurality of structural states to represent information stored at the storage area, by passing a current through the storage area between the tip electrode and media electrode.

Abstract translation: 一种半导体存储装置，包括尖端电极，介质电极和存储介质。 存储介质具有可配置为处于多个结构状态之一的存储区域，以通过使电流通过尖端电极和介质电极之间的存储区域来表示存储在存储区域的信息。

公开(公告)号：US20050201173A1

公开(公告)日：2005-09-15

申请号：US11089687

申请日：2005-03-24

Applicant: Manish Sharma ,  Lung Tran

Inventor： Manish Sharma ,  Lung Tran

IPC: G11C11/00 ,  G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C7/00

CPC classification number: H01L27/224 ,  G11C11/00 ,  G11C11/15 ,  G11C11/16

Abstract: The method for manufacturing a data storage device is disclosed. The device has a plurality of word lines, a plurality of bit lines, and a resistive crosspoint array of memory cells. Each memory cell is connected to a bit line and connected to an isolation diode that further connects to a respective word line. The isolation diode provides a unidirectional conductive path from the bit line to the word line. Each word line provides a common metal-semiconductor contact with each diode sharing the word line such that each diode has a separate metal contact located between the semiconductor portion of the common metal-semiconductor contact and its respective memory cell.

Abstract translation: 公开了一种用于制造数据存储装置的方法。 该装置具有多个字线，多个位线和存储器单元的电阻交叉点阵列。 每个存储单元连接到位线并连接到进一步连接到相应字线的隔离二极管。 隔离二极管提供从位线到字线的单向导电路径。 每个字线提供与共享字线的每个二极管共同的金属 - 半导体接触，使得每个二极管具有位于公共金属 - 半导体触点的半导体部分和其相应存储单元之间的单独的金属触点。

公开(公告)号：US20050185453A1

公开(公告)日：2005-08-25

申请号：US11105054

申请日：2005-04-13

Applicant: Lung Tran ,  Thomas Anthony

Inventor： Lung Tran ,  Thomas Anthony

IPC: G11C11/15 ,  G11C11/16 ,  G11C11/00

CPC classification number: G11C11/16 ,  G11C11/1675

Abstract: The invention includes a stacked magnetic memory structure. The magnetic memory structure includes a stacked magnetic memory structure. The first layer includes a first plurality of magnetic tunnel junctions. A second layer is formed adjacent to the first layer. The second layer includes a second plurality of magnetic tunnel junctions. The stacked magnetic memory structure further includes a common first group conductor connected to each of the first plurality of magnetic tunnel junctions and the second plurality of magnetic tunnel junctions.

Abstract translation: 本发明包括堆叠磁存储器结构。 磁存储器结构包括堆叠磁存储器结构。 第一层包括第一多个磁性隧道结。 形成与第一层相邻的第二层。 第二层包括第二多个磁性隧道结。 层叠的磁存储器结构还包括连接到第一多个磁隧道结中的每一个和第二多个磁性隧道结的公共第一组导体。

公开(公告)号：US06925003B2

公开(公告)日：2005-08-02

申请号：US10658158

申请日：2003-09-08

Applicant: Lung Tran ,  Thomas C. Anthony

Inventor： Lung Tran ,  Thomas C. Anthony

IPC: G11C11/15 ,  G11C11/00 ,  G11C11/02 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

CPC classification number: G11C11/16

Abstract: The invention includes a magnetic memory cell. The magnetic memory cell includes a reference layer having a preset magnetization. A barrier layer is formed adjacent to the reference layer. A sense layer is formed adjacent to the barrier layer. A first conductive write line is electrically connected to the reference layer. The magnetic memory cell further includes a second conductive write line having a gap, the gap being filled by at least a portion of the sense layer. A write current conducting through the second conductive write line is at least partially conducted through the portion of the sense layer, the write current increasing a temperature of the sense layer.

Abstract translation: 本发明包括磁存储单元。 磁存储单元包括具有预设磁化强度的参考层。 形成与参考层相邻的阻挡层。 形成与阻挡层相邻的感应层。 第一导电写入线电连接到参考层。 磁存储单元还包括具有间隙的第二导电写入线，该间隙由感测层的至少一部分填充。 通过第二导电写入线传导的写入电流至少部分地传导通过感测层的部分，写入电流增加感测层的温度。

公开(公告)号：US06903403B2

公开(公告)日：2005-06-07

申请号：US10902925

申请日：2004-07-30

Applicant: Manish Sharma ,  Lung Tran

Inventor： Manish Sharma ,  Lung Tran

IPC: H01L21/336 ,  H01L21/8238 ,  H01L27/108 ,  H01L27/22 ,  H01L29/76 ,  H01L29/94 ,  H01L43/12

CPC classification number: H01L27/222 ,  H01L43/12

Abstract: An exemplary nonvolatile memory array comprises a substrate and a plurality of memory cells formed on the substrate, each of the memory cells being addressable via at least first and second conductors during operations. An exemplary memory cell in the exemplary memory array includes a ferromagnetic annular data layer having an opening, the opening enabling the second conductor to electrically contact the first conductor, an intermediate layer on at least a portion of the annular data layer, and a soft reference layer on at least a portion of the intermediate layer.