利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

11 条记录 (耗时 0.02 秒)

    Semiconductor device including a multi-channel fin field effect transistor and method of fabricating the same
    2.
    发明申请
    Semiconductor device including a multi-channel fin field effect transistor and method of fabricating the same 有权
    包括多通道鳍式场效应晶体管的半导体器件及其制造方法

    公开(公告)号：US20050285204A1

    公开(公告)日：2005-12-29

    申请号：US11033526

    申请日：2005-01-12

    申请人： Sungmin Kim ,  Donggun Park ,  Eunjung Yoon ,  Semyeong Jang ,  Keunnam Kim ,  Yongchul Oh

    发明人： Sungmin Kim ,  Donggun Park ,  Eunjung Yoon ,  Semyeong Jang ,  Keunnam Kim ,  Yongchul Oh

    IPC分类号： H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

    CPC分类号： H01L29/66545 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684

    摘要： In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the semiconductor substrate in the cell region and in the peripheral circuit region including an isolation region defining an active region, a portion of the active region protruding above an upper surface of the isolation region to define at least two active channels, a gate dielectric layer formed over the active region of the semiconductor substrate including the at least two protruding active channels, a gate electrode formed over the gate dielectric layer and the isolation region of the semiconductor substrate, and a source/drain region formed in the active region of the semiconductor substrate on either side of the gate electrode.

    摘要翻译： 在半导体器件及其制造方法中，半导体器件包括具有单元区域和外围电路区域的半导体衬底，单元区域中的半导体衬底的一部分和包括隔离区域的外围电路区域 限定有源区，所述有源区的一部分突出于所述隔离区的上表面之上，以限定至少两个有源沟道;在所述半导体衬底的有源区上形成的包括所述至少两个突出的有源沟道的栅介质层， 形成在栅极电介质层和半导体衬底的隔离区域上的栅极电极，以及形成在栅电极两侧的半导体衬底的有源区域中的源极/漏极区域。

    Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same
    3.
    发明授权
    Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same 有权
    包括具有突出的有源部分的多通道鳍状场效应晶体管的半导体器件及其制造方法

    公开(公告)号：US07394116B2

    公开(公告)日：2008-07-01

    申请号：US11033526

    申请日：2005-01-12

    申请人： Sungmin Kim ,  Donggun Park ,  Eunjung Yoon ,  Semyeong Jang ,  Keunnam Kim ,  Yongchul Oh

    发明人： Sungmin Kim ,  Donggun Park ,  Eunjung Yoon ,  Semyeong Jang ,  Keunnam Kim ,  Yongchul Oh

    IPC分类号： H01L29/76 ,  H01L29/745

    CPC分类号： H01L29/66545 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684

    摘要： In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the semiconductor substrate in the cell region and in the peripheral circuit region including an isolation region defining an active region, a portion of the active region protruding above an upper surface of the isolation region to define at least two active channels, a gate dielectric layer formed over the active region of the semiconductor substrate including the at least two protruding active channels, a gate electrode formed over the gate dielectric layer and the isolation region of the semiconductor substrate, and a source/drain region formed in the active region of the semiconductor substrate on either side of the gate electrode.

    摘要翻译： 在半导体器件及其制造方法中，半导体器件包括具有单元区域和外围电路区域的半导体衬底，单元区域中的半导体衬底的一部分和包括隔离区域的外围电路区域 限定有源区，所述有源区的一部分突出于所述隔离区的上表面之上，以限定至少两个有源沟道;在所述半导体衬底的有源区上形成的包括所述至少两个突出的有源沟道的栅介质层， 形成在栅极电介质层和半导体衬底的隔离区域上的栅极电极，以及形成在栅电极两侧的半导体衬底的有源区域中的源极/漏极区域。

    METHODS OF FABRICATING SEMICONDUCTOR DEVICES
    8.
    发明申请
    METHODS OF FABRICATING SEMICONDUCTOR DEVICES 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20150333071A1

    公开(公告)日：2015-11-19

    申请号：US14755690

    申请日：2015-06-30

    申请人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    发明人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    IPC分类号： H01L27/108 ,  H01L21/265 ,  H01L21/768

    CPC分类号： H01L27/10888 ,  H01L21/26513 ,  H01L21/7682 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10885

    摘要： Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

    摘要翻译： 提供半导体器件及其制造方法。 在其形成方法中，可以在位线接触的侧壁上形成蚀刻停止图案和单独的间隔物，其中蚀刻停止图案和分离间隔物各自包含相对于氧化物具有蚀刻选择性的材料。 可以形成存储节点接触插塞孔，使得蚀刻停止图案和分离的间隔件形成与位线接触件间隔开的存储节点接触插塞孔的侧壁的一部分。 存储节点接触塞孔可以被清洁以去除存储节点接触塞孔中形成的天然氧化物。 还公开了相关设备。

    Semiconductor devices
    9.
    发明授权
    Semiconductor devices 有权
    半导体器件

    公开(公告)号：US09099343B2

    公开(公告)日：2015-08-04

    申请号：US14057530

    申请日：2013-10-18

    申请人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    发明人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    IPC分类号： H01L21/70 ,  H01L27/108 ,  H01L21/768

    CPC分类号： H01L27/10888 ,  H01L21/26513 ,  H01L21/7682 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10885

    摘要： Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

    摘要翻译： 提供半导体器件及其制造方法。 在其形成方法中，可以在位线接触的侧壁上形成蚀刻停止图案和单独的间隔物，其中蚀刻停止图案和分离间隔物各自包含相对于氧化物具有蚀刻选择性的材料。 可以形成存储节点接触插塞孔，使得蚀刻停止图案和分离的间隔件形成与位线接触件间隔开的存储节点接触插塞孔的侧壁的一部分。 存储节点接触塞孔可以被清洁以去除存储节点接触塞孔中形成的天然氧化物。 还公开了相关设备。

    SEMICONDUCTOR DEVICES
    10.
    发明申请
    SEMICONDUCTOR DEVICES 有权
    半导体器件

    公开(公告)号：US20140110816A1

    公开(公告)日：2014-04-24

    申请号：US14057530

    申请日：2013-10-18

    申请人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    发明人： Keunnam Kim ,  Sunyoung Park ,  Kyehee Yeom ,  Hyeon-Woo Jang ,  Jin-Won Jeong ,  Changhyun Cho ,  HyeongSun Hong

    IPC分类号： H01L27/10

    CPC分类号： H01L27/10888 ,  H01L21/26513 ,  H01L21/7682 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10885

    摘要： Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed.

    摘要翻译： 提供半导体器件及其制造方法。 在其形成方法中，可以在位线接触的侧壁上形成蚀刻停止图案和单独的间隔物，其中蚀刻停止图案和分离间隔物各自包含相对于氧化物具有蚀刻选择性的材料。 可以形成存储节点接触插塞孔，使得蚀刻停止图案和分离的间隔件形成与位线接触件间隔开的存储节点接触插塞孔的侧壁的一部分。 存储节点接触塞孔可以被清洁以去除存储节点接触塞孔中形成的天然氧化物。 还公开了相关设备。