摘要:
In a digital transmission system including a transmitter (2) coupled via a channel (4) to a receiver (6) a detection signal r.sub.k is compared with a number of reference values to determine the destination symbols a.sub.k. Since the size of the received signal r.sub.k is not known in advance, the ratio between the detection signal and the reference values is to be determined by an adapting circuit (16) on the basis of the received signal and the decisions made. The problem may then occur that as a result of an initially erroneous value of the ratio between detection signal and reference values not a correct adaptation is made. By recognizing such a situation because specific values of the symbols a.sub.k are lacking, in such a situation said ratio can be brought to such a value by the correction circuit (18) that all the values of a.sub.k again occur.
摘要翻译:在包括经由信道(4)耦合到接收机(6)的发射机(2)的数字传输系统中,将检测信号rk与多个参考值进行比较,以确定目的地符号+ E,cir a + EE k。 由于接收信号rk的大小预先不知道,所以检测信号与参考值之间的比率将由适配电路(16)根据接收到的信号和作出的决定来确定。 然后可能出现这样的问题,即由于检测信号和参考值之间的比率的最初错误的值不是正确的适应。 通过识别这种情况,因为缺少符号+ E,cir a + EE k的特定值,在这种情况下,可以通过校正电路(18)使所述比值达到这样的值,即所有的+ E, 再次出现cir a + EE k。
摘要:
A fast acquisition method is described that combines timing, gain and, if required, equalizer acquisition in one go with word synchronization. At the heart of the method is a preamble that begins with a repetition of identical words P whose length matches the code-word length. Preferably the method ends with a frame-sync word based on the bit-by-bit inverse of P. Main attractions of the technique are simplicity, speed, and robustness.
摘要:
A device for write precompensation of data signals to be recorded on a magnetic medium, has an input for receiving input data signals and an output for supplying the output signals to be recorded, at least a plurality of the signal transitions in these output data signals being delayed with respect to the corresponding signal transitions in the input data signal, the signal path between the input and the output including a series arrangement of a filter circuit and a hysteresis circuit, the hysteresis circuit receiving the output signal of the filter circuit and supplying a binary signal as its output signal. This write precompensation device simply enables allowance to be made for the influence of a large number of preceding symbol values on a transition to be recorded. When the device is combined with a known write compensation device it suffices to use a simple filter.
摘要:
An unreliability detector apparatus for generating an unreliable decision signal in response to an input signal. An input terminal receives the input signal, a first comparator unit compares the input signal with a first threshold value and a second comparator unit compares the input signal with a second threshold value. A processor is provided for carrying out a function for determining whether a curve in an X-Y plane has at least one point in common with a predetermined line in the X-Y plane. The curve in the X-Y plane is obtained by plotting time equivalent signals values of the first and second comparator output signals along the Y- and X-axis respectively of the X-Y plane, while the predetermined line in the X-Y plane is formed by a first line interconnecting a first fixed point and a second fixed point and in which half plane a third fixed point is located. The three fixed points are obtained by plotting combinations of a first through a fourth signal value along the X- and Y-axis. The processor is adapted to generate the unreliable decision signal upon detecting that the curve has at least one point in common with the predetermined line. An apparatus for reading information from a record carrier may be provided with the unreliability detection apparatus.
摘要:
An arrangement for reading information from a record carrier, such as in a HDD, include a read head (Rmr1), an amplifier (74) for amplifying the signal read by the read head, an equalizer (76) for equalizing the signal read by the read head, and a bit detector (80) for detecting bits in the signal read by the read head. The invention, the arrangement further comprises a DC correction unit (78) for subtracting a correction value from an input signal in response to an error signal so as to obtain a DC corrected output signal. The bit detector (80) detects a sequence of bits based in the DC corrected output signal. Further, an error signal generating unit (82,83,85) is present for generating the error signal in response to the DC corrected output signal and the sequence.
摘要:
A method and a device in which information is written on a medium and is read out, and which establishes whether the information read is sufficiently reliable, and in which so-called erasure information is used to establish the influence of media defects and other imperfections on the occurrence of errors in a transmission system. The medium is, for example, a hard disk containing one or more bad spots whose location can be accurately detected. The implementation of the method makes accurate and fast computation of the bit error rate possible.
摘要:
A device for write precompensation of data signals to be recorded on a magnetic medium, which device has an input for receiving input data signals and an output for supplying output signals to be recorded, an integrator/limiter circuit which receives the input data signals and which supplies an output signal which is in synchronism with the data signal and whose amplitude varies substantially linearly as a function of time at positions where a signal transition appears in the data signal, which amplitude is limited within a data symbol interval; an adjustable filter which receives the input signals and supplies an output signal whose instantaneous values depend on the pattern of preceding and future signal transitions in the data signal; and a comparator circuit which through comparison of the output signal of the integrator/limiter circuit and the output signal of the filter produces the output signal in which at least some signal transitions of the input data signal can be shifted in time. An important aspect of the present invention is that with the output signal dt an arbitrary number of desired time shifts can be obtained rather than that, as in the prior art, only a choice can be made from a limited number of delay values.
摘要:
A recording apparatus including a magnetic write head and a write amplifier with capacitive current compensation. The write amplifier is made up of four current mirrors which are turned on two at a time by two switchable floating current sources connected between the input terminals of the current mirrors in order to produce a write current of alternating polarity through the write head. The parasitic capacitances across the write head and/or the parasitic capacitances of the write amplifier at the write terminals are neutralized by means of neutralizing capacitors. The high impedance at the terminals of the write head enables the common-mode voltage across the write head to be fixed at any desired voltage value by means of a common-mode circuit.
摘要:
An apparatus for recording on a magnetic record carrier includes a write amplifier comprising four current mirrors which are turned on two at a time by two switchable floating current sources connected between the input terminals of the current mirrors in order to produce a write current of alternating polarity through a write head. The high impedance at the terminals of the write head enables the common-mode voltage across the write head to be fixed at any desired voltage value by means of a common-mode circuit. The symmetrical structure further enables the parasitic capacitances at the write terminals to be neutralized by means of neutralizing capacitors.
摘要:
An electronic circuit comprises coupled transconductors (TR1 and TR2). The transconductors comprise two complementary differential pairs whose outputs are connected directly to two output terminals. Two diodes (P3, N3) are arranged in series between the common terminals of the differential pairs. The common-mode voltage of the differential pairs is available on the node between the two diodes. The common-mode voltage of the one transconductor (TR2) is used to control one of the bias current sources of the other transconductor (TR1) and, if desired, also that of the one transconductor (TR2). In this way the common-mode voltage on the output terminals of the other transconductor (TR1) is fixed.