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    Integrated verticle NPN and vertical oxide fuse programmable memory cell
    1.
    发明授权
    Integrated verticle NPN and vertical oxide fuse programmable memory cell 失效
    集成垂直NPN和垂直氧化物熔丝可编程存储单元

    公开(公告)号：US4701780A

    公开(公告)日：1987-10-20

    申请号：US903200

    申请日：1986-12-05

    申请人： Kevin T. Hankins ,  Mark W. Michael ,  Jay D. Moser ,  Brian K. Rosier

    发明人： Kevin T. Hankins ,  Mark W. Michael ,  Jay D. Moser ,  Brian K. Rosier

    IPC分类号： H01L21/033 ,  H01L21/768 ,  H01L23/525 ,  H01L27/02 ,  H01L27/12 ,  H01L29/04 ,  H01L29/34

    CPC分类号： H01L23/5252 ,  H01L21/033 ,  H01L21/76888 ,  H01L2924/0002

    摘要： A method of forming an aligned vertical oxide fuse and emitter using a single mask. The mask includes an opening through which impurities are introduced into the base region through a first layer of insulation and which is subsequently used to form the emitter aperture through the first insulative layer. The thin fuse oxide is formed by non-selective oxidation after removal of the mask. Alternatively, the impurities may also be introduced through the emitter aperture or from doped thin fuse oxide after removal of the mask. The resulting integrated circuit includes at least three regions of oxidation of three thicknesses, in descending order, field oxide, device opening or gate oxide and fuse oxide.

    摘要翻译： 使用单个掩模形成对准的垂直氧化物熔丝和发射体的方法。 掩模包括开口，通过该开口，杂质通过第一绝缘层被引入基底区域中，随后用于通过第一绝缘层形成发射器孔。 除去掩模之后，通过非选择性氧化形成薄熔丝氧化物。 或者，杂质也可以在除去掩模之后通过发射器孔或掺杂的薄熔丝氧化物引入。 所得到的集成电路包括三个厚度的氧化的至少三个区域，按降序，场氧化物，器件开路或栅极氧化物和熔丝氧化物。

    Method of making an intergrated vertical NPN and vertical oxide fuse programmable memory cell
    2.
    发明授权
    Method of making an intergrated vertical NPN and vertical oxide fuse programmable memory cell 失效
    制造集成垂直NPN和垂直氧化物熔丝可编程存储器单元的方法

    公开(公告)号：US4635345A

    公开(公告)日：1987-01-13

    申请号：US711816

    申请日：1985-03-14

    申请人： Kevin T. Hankins ,  Mark W. Michael ,  Brian K. Rosier

    发明人： Kevin T. Hankins ,  Mark W. Michael ,  Brian K. Rosier

    IPC分类号： H01L21/033 ,  H01L23/525 ,  H01L21/20 ,  H01L21/479

    CPC分类号： H01L23/5252 ,  H01L21/033 ,  H01L2924/0002 ,  Y10S438/981

    摘要： A method of forming an aligned vertical oxide fuse and emitter using a single mask. The mask includes an opening through which impurities are introduced into the base region through a first layer of insulation and which is subsequently used to form the emitter aperture through the first insulative layer. The thin fuse oxide is formed by non-selective oxidation after removal of the mask. Alternatively, the impurities may also be introduced through the emitter aperture or from doped thin fuse oxide after removal of the mask. The resulting integrated circuit includes at least three regions of oxidation of three thicknesses, in descending order, field oxide, device opening or gate oxide and fuse oxide.

    摘要翻译： 使用单个掩模形成对准的垂直氧化物熔丝和发射体的方法。 掩模包括开口，通过该开口，杂质通过第一绝缘层被引入基底区域中，随后用于通过第一绝缘层形成发射器孔。 除去掩模之后，通过非选择性氧化形成薄熔丝氧化物。 或者，杂质也可以在除去掩模之后通过发射器孔或掺杂的薄熔丝氧化物引入。 所得到的集成电路包括三个厚度的氧化的至少三个区域，按降序，场氧化物，器件开路或栅极氧化物和熔丝氧化物。

    Critical dimension measurement structure
    3.
    发明授权
    Critical dimension measurement structure 失效
    关键尺寸测量结构

    公开(公告)号：US4566192A

    公开(公告)日：1986-01-28

    申请号：US566399

    申请日：1983-12-28

    申请人： Kevin T. Hankins ,  Anthony L. Rivoli

    发明人： Kevin T. Hankins ,  Anthony L. Rivoli

    IPC分类号： G01B5/02 ,  G01B5/00

    CPC分类号： G01B5/02

    摘要： A pattern for determining dimensions of projected or printed figures is provided having individual scaling figures therein on a mask or template. Dimensional measurement may be indicated by alignment of opposing edges of scaling figures offset from each other along the corresponding axis of alignment. Reference marks may be provided on the pattern and associated with each possible axis of alignment for indicating an absolute dimension of a concurrently projected or printed figure. To conserve space, the pattern may be "densepacked" with scaling figures such that each scaling figure includes a plurality of opposing edges, each alignable along a different axis in response to different levels of dimensional distortion.

    摘要翻译： 在掩模或模板上提供了用于确定投影或印刷图形的尺寸的图案，其中具有单独的缩放图。 尺寸测量可以通过沿着对准的对准轴线彼此偏移的缩放图形的相对边缘的对准来指示。 可以在图案上提供参考标记并与每个可能的对准轴相关联，以指示同时投影或打印的图形的绝对尺寸。 为了节省空间，可以利用缩放图来“缩小”图案，使得每个缩放图包括多个相对的边缘，每个相对的边缘可以响应于不同水平的尺寸失真沿着不同的轴线对准。