公开(公告)号：US20080204114A1

公开(公告)日：2008-08-28

申请号：US12035585

申请日：2008-02-22

申请人： Ki-Hong Kim ,  Jong-Seok Kim ,  Jin Ho Oh ,  Choon-Oh Lee

发明人： Ki-Hong Kim ,  Jong-Seok Kim ,  Jin Ho Oh ,  Choon-Oh Lee

IPC分类号： H03K17/687 ,  H03K17/00

CPC分类号： H03K17/16 ,  H03K17/161 ,  H03K17/6872

摘要： A transmission gate switch includes a switching unit to conduct a switching operation between first and second nodes in response to a switching signal, and an isolation unit to prevent the switching unit from being turned on by a negative swing of the first or second node while the switching unit is being turned off.

摘要翻译： 传输门开关包括：切换单元，用于响应于切换信号进行第一和第二节点之间的切换操作;以及隔离单元，用于防止开关单元被第一或第二节点的负摆动导通，同时 开关单元正在关闭。

公开(公告)号：US07719321B2

公开(公告)日：2010-05-18

申请号：US12289855

申请日：2008-11-06

申请人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

发明人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

IPC分类号： H03K9/08

CPC分类号： H04L7/033 ,  H03K5/1252 ,  H03K5/1534 ,  H04L7/0083

摘要： A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.

摘要翻译： 短脉冲抑制电路可以包括边缘检测器，滤波器电路，比较电路和门控电路。 边缘检测器可以延迟输入信号以产生延迟的输入信号，并且检测输入信号的边沿以产生边缘检测信号。 滤波器电路可以对边缘检测信号执行低通滤波以产生第一信号。 比较电路可以将第一信号与参考电压进行比较。 门控电路可以基于比较电路的输出信号对延迟的输入信号进行门控。 因此，短脉冲抑制电路可以具有触发器的足够的建立/保持时间裕度，并且即使在初始操作期间输入信号的状态没有改变时，也可以采样输入信号。

公开(公告)号：US20090189644A1

公开(公告)日：2009-07-30

申请号：US12289855

申请日：2008-11-06

申请人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

发明人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

IPC分类号： G01R29/02

CPC分类号： H04L7/033 ,  H03K5/1252 ,  H03K5/1534 ,  H04L7/0083

摘要： A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.

摘要翻译： 短脉冲抑制电路可以包括边缘检测器，滤波器电路，比较电路和门控电路。 边缘检测器可以延迟输入信号以产生延迟的输入信号，并且检测输入信号的边沿以产生边缘检测信号。 滤波器电路可以对边缘检测信号执行低通滤波以产生第一信号。 比较电路可以将第一信号与参考电压进行比较。 门控电路可以基于比较电路的输出信号对延迟的输入信号进行门控。 因此，短脉冲抑制电路可以具有触发器的足够的建立/保持时间裕度，并且即使当在初始操作期间输入信号的状态不改变时，也可以采样输入信号。

公开(公告)号：US07285977B2

公开(公告)日：2007-10-23

申请号：US11165394

申请日：2005-06-24

申请人： Jong-Seok Kim

发明人： Jong-Seok Kim

IPC分类号： H03K17/16 ,  H03K19/003

CPC分类号： H04L25/0278 ,  H03K5/082

摘要： A circuit for controlling impedance may include an impedance adjustment circuit and a control signal generation circuit. The impedance adjustment circuit may adjust an impedance value based on a control signal. The control signal generation circuit may provide the impedance adjustment circuit with a control signal that corresponds to one of an impedance value at a first clock cycle and an impedance value at a second clock cycle that approaches a target impedance.

摘要翻译： 用于控制阻抗的电路可以包括阻抗调节电路和控制信号产生电路。 阻抗调整电路可以基于控制信号来调整阻抗值。 控制信号产生电路可以向阻抗调节电路提供对应于第一时钟周期的阻抗值和接近目标阻抗的第二时钟周期的阻抗值之一的控制信号。

公开(公告)号：US20050040975A1

公开(公告)日：2005-02-24

申请号：US10793819

申请日：2004-03-08

申请人： Jong-Seok Kim

发明人： Jong-Seok Kim

IPC分类号： H04L9/22 ,  H03M5/04 ,  H03M7/00 ,  H04L1/24 ,  H04L25/49

CPC分类号： H03M5/04 ,  H04L1/24 ,  H04L25/4906

摘要： A method of generating a pseudo-8B/10B-code bit sequence that is similar to an 8B/10B code may include: generating a parallel pseudo random bit sequence having N bits wherein N is an integer and N≧2; and transforming the parallel pseudo random bit sequence into a parallel first bit sequence that is similar to an 8B/10B code, a number Q of consecutive “0”s or “1”s of the first bit sequence being Q≦M1, wherein Q and M1 are integers and M

摘要翻译： 一种产生类似于8B / 10B码的伪8B / 10B码比特序列的方法可以包括：产生具有N比特的并行伪随机比特，其中N是整数，N> = 2; 并且将并行伪随机比特序列变换成类似于8B / 10B代码的并行第一比特序列，第一比特序列的连续“0”或“1”的数目Q为Q <= M1，其中 Q和M1是整数，M

公开(公告)号：US07796063B2

公开(公告)日：2010-09-14

申请号：US12289889

申请日：2008-11-06

申请人： Jong-Seok Kim ,  Nam-Hyun Kim ,  Cheon-Oh Lee ,  Han-Kyul Lim

发明人： Jong-Seok Kim ,  Nam-Hyun Kim ,  Cheon-Oh Lee ,  Han-Kyul Lim

IPC分类号： H03M9/00

CPC分类号： H03M9/00 ,  H03K5/135

摘要： A transmission circuit includes a serial clock generator, a serializer and a transmission clock generator. The serial clock generator generates a serial clock. The serializer serializes N-bit parallel data to N-bit serial data in synchronization with the serial clock. The transmission clock generator receives the serial clock to generate a transmission clock that has a same delay as the N-bit serial data, and the data transmission circuit simultaneously transmits the N-bit serial data and the serial clock.

摘要翻译： 传输电路包括串行时钟发生器，串行器和传输时钟发生器。 串行时钟发生器产生串行时钟。 串行器与串行时钟同步将N位并行数据串行化为N位串行数据。 传输时钟发生器接收串行时钟以产生与N位串行数据具有相同延迟的传输时钟，并且数据传输电路同时发送N位串行数据和串行时钟。

公开(公告)号：US20100053272A1

公开(公告)日：2010-03-04

申请号：US12416954

申请日：2009-04-02

申请人： DONG-SIK SHIM ,  Yong-Seop Yoon ,  Bang-Weon Lee ,  Moon-Chul Lee ,  Yong-Won Jeong ,  Jong-Seok Kim

发明人： DONG-SIK SHIM ,  Yong-Seop Yoon ,  Bang-Weon Lee ,  Moon-Chul Lee ,  Yong-Won Jeong ,  Jong-Seok Kim

IPC分类号： B41J2/14

CPC分类号： B41J2/14145

摘要： Disclosed are an ink ejecting device and a method of manufacturing the same. The disclosed ink ejecting device includes an inkjet head including a substrate, which includes an ink feed hole, a plurality of via holes, which are formed in the rear surface of the substrate, and which expose the ink feed holes therethtough, a chamber layer stacked on the substrate, and a nozzle layer stacked on the chamber layer, and includes a base header, which is attached to the inkjet head and includes a plurality of ink supply slots having a corresponding arrangement with respect to the via holes.

摘要翻译： 公开了一种喷墨装置及其制造方法。 所公开的喷墨装置包括喷墨头，其包括基板，该基板包括形成在基板的后表面中并且使墨供给孔暴露的多个通孔，堆叠的腔层 在基板上，以及层叠在室层上的喷嘴层，并且包括附接到喷墨头并包括相对于通孔具有相应布置的多个供墨槽的基座。

公开(公告)号：US20090167573A1

公开(公告)日：2009-07-02

申请号：US12289889

申请日：2008-11-06

申请人： Jong-Seok Kim ,  Nam-Hyun Kim ,  Cheon-Oh Lee ,  Han-Kyul Lim

发明人： Jong-Seok Kim ,  Nam-Hyun Kim ,  Cheon-Oh Lee ,  Han-Kyul Lim

IPC分类号： H03M9/00 ,  H04B1/38

CPC分类号： H03M9/00 ,  H03K5/135

摘要： A data transmission circuit is disclosed. The transmission circuit includes a serial clock generator, a serializer and a transmission clock generator. The serial clock generator generates a serial clock. The serializer serializes N-bit parallel data to N-bit serial data in synchronization with the serial clock. The transmission clock generator receives the serial clock to generate a transmission clock that has a same delay as the N-bit serial data, and the data transmission circuit simultaneously transmits the N-bit serial data and the serial clock.

摘要翻译： 公开了一种数据传输电路。 传输电路包括串行时钟发生器，串行器和传输时钟发生器。 串行时钟发生器产生串行时钟。 串行器与串行时钟同步将N位并行数据串行化为N位串行数据。 传输时钟发生器接收串行时钟以产生与N位串行数据具有相同延迟的传输时钟，并且数据传输电路同时发送N位串行数据和串行时钟。

公开(公告)号：US20120077529A1

公开(公告)日：2012-03-29

申请号：US13249029

申请日：2011-09-29

申请人： Jong-Seok Kim ,  Hyung-Jun Jeon

发明人： Jong-Seok Kim ,  Hyung-Jun Jeon

IPC分类号： H04W4/14 ,  H04W4/12

CPC分类号： H04W4/14 ,  H04L29/12132 ,  H04L29/12198 ,  H04L61/1552 ,  H04L61/1594 ,  H04L67/1095 ,  H04M2242/40 ,  H04W4/60

摘要： An apparatus and method update data in a portable terminal. The apparatus comprises a data update unit and a controller. The data unit is configured to manage information associated with the portable terminal and a request for an address book update transmitted from the portable terminal. The controller is configured to receive changed address book information from an update server that manages an address book of another portable terminal in response to the request transmitted by the data update unit.

摘要翻译： 装置和方法更新便携式终端中的数据。 该装置包括数据更新单元和控制器。 数据单元被配置为管理与便携式终端相关联的信息以及从便携式终端发送的对地址簿更新的请求。 控制器被配置为响应于由数据更新单元发送的请求，从管理另一便携式终端的地址簿的更新服务器接收改变的地址簿信息。

公开(公告)号：US07684662B2

公开(公告)日：2010-03-23

申请号：US12195621

申请日：2008-08-21

申请人： Young-Tack Houng ,  Nam-Kyoo Park ,  Sang-Wook Kwon ,  In-Sang Song ,  Jong-Seok Kim ,  Suk-Mo Koo ,  Sun-Kyu Yu

发明人： Young-Tack Houng ,  Nam-Kyoo Park ,  Sang-Wook Kwon ,  In-Sang Song ,  Jong-Seok Kim ,  Suk-Mo Koo ,  Sun-Kyu Yu

IPC分类号： G02B6/12 ,  G02F1/035

CPC分类号： G02B6/1225 ,  B82Y20/00 ,  G02B2006/12109 ,  G02B2006/12142 ,  G02F1/225 ,  G02F7/00 ,  G02F2202/32

摘要： An AD converter is provided. The AD converter includes a light source unit which provides an optical signal, at least one waveguide unit which consists of a photonic crystal and transmits the optical signal, a modulation unit which applies a RF signal to the at least one waveguide unit, thereby modulating an optical signal output from the at least one waveguide unit, and a digital conversion unit which converts the modulated optical signal to a digital signal. Accordingly, a compact-sized AD convert can be realized.

摘要翻译： 提供一个AD转换器。 AD转换器包括提供光信号的光源单元，由光子晶体组成并传输光信号的至少一个波导单元，向至少一个波导单元施加RF信号的调制单元，从而调制 从至少一个波导单元输出的光信号，以及将经调制的光信号转换为数字信号的数字转换单元。 因此，可以实现紧凑型的AD转换。