公开(公告)号：US20220130471A1

公开(公告)日：2022-04-28

申请号：US17647509

申请日：2022-01-10

Applicant: Kioxia Corporation

Inventor： Tatsuro MIDORIKAWA ,  Masami MASUDA

IPC: G11C16/30 ,  H02M3/07

Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.

公开(公告)号：US20240071478A1

公开(公告)日：2024-02-29

申请号：US18504018

申请日：2023-11-07

Applicant: Kioxia Corporation

Inventor： Hideyuki KATAOKA ,  Yoshinao SUZUKI ,  Mai SHIMIZU ,  Kazuyoshi MURAOKA ,  Masami MASUDA ,  Yoshikazu HOSOMURA

IPC: G11C11/4096 ,  G11C5/06 ,  G11C11/4072 ,  G11C11/4076

CPC classification number: G11C11/4096 ,  G11C5/063 ,  G11C11/4072 ,  G11C11/4076

Abstract: A semiconductor memory device comprises a first memory cell and a second memory cell. The semiconductor memory device is configured to be able to perform: a first operation which is a read operation or the like to the first memory cell; and a second operation which is a read operation or the like to the second memory cell. The semiconductor memory device transitions to a standby mode after performing the first operation in response to an input of a first command set and a second command set. The semiconductor memory device performs a charge share operation after the standby mode is released in response to an input of a third command set and a fourth command set during the standby mode. The semiconductor memory device performs the second operation using at least a part of an electric charge generated when the first operation is performed.

公开(公告)号：US20230083392A1

公开(公告)日：2023-03-16

申请号：US17680144

申请日：2022-02-24

Applicant: KIOXIA CORPORATION

Inventor： Yoshikazu HOSOMURA ,  Hideyuki KATAOKA ,  Yoshinao SUZUKI ,  Mai SHIMIZU ,  Kazuyoshi MURAOKA ,  Masami MASUDA

IPC: H01L27/11524 ,  G11C16/04 ,  G11C5/06 ,  H01L27/11519 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578

Abstract: A semiconductor storage device includes a memory cell array having a plurality of first conductive layers stacked in a first direction and a plurality of memory cells connected to the plurality of first conductive layers, a wiring layer, and an insulating layer between the memory cell array and the wiring layer and separating the memory cell array and the wiring layer in a second direction intersecting the first direction. The wiring layer includes a plurality of second conductive layers stacked in the first direction, each of the second conductive layers having a corresponding first conductive layer at a same layer, and a contact connected to at least a part of the plurality of second conductive layers and extending in the first direction.

公开(公告)号：US20240274208A1

公开(公告)日：2024-08-15

申请号：US18630411

申请日：2024-04-09

Applicant: KIOXIA CORPORATION

Inventor： Tatsuro MIDORIKAWA ,  Masami MASUDA

IPC: G11C16/30 ,  H02M3/07

CPC classification number: G11C16/30 ,  H02M3/07

Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.

公开(公告)号：US20230352103A1

公开(公告)日：2023-11-02

申请号：US18349443

申请日：2023-07-10

Applicant: KIOXIA CORPORATION

Inventor： Tatsuro MIDORIKAWA ,  Masami MASUDA

IPC: G11C16/30 ,  H02M3/07

CPC classification number: G11C16/30 ,  H02M3/07

Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.