METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20240099009A1

    公开(公告)日:2024-03-21

    申请号:US18446583

    申请日:2023-08-09

    Abstract: A method for manufacturing a semiconductor device includes: forming a release layer including a first polycrystalline semiconductor layer provided on a first substrate, and a second polycrystalline semiconductor layer provided between the first substrate and the first polycrystalline semiconductor layer and having a p-type impurity concentration which is lower than that of the first polycrystalline semiconductor layer, and an n-type impurity concentration which is higher than that of the first polycrystalline semiconductor layer; subjecting the first polycrystalline semiconductor layer to anodic chemical conversion to form a first porous layer; forming a first device layer on the first porous layer; and bonding together the first device layer and a second device layer provided on a second substrate.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR STORAGE DEVICE

    公开(公告)号:US20230387317A1

    公开(公告)日:2023-11-30

    申请号:US18178464

    申请日:2023-03-03

    CPC classification number: H01L29/7869 H10B12/30

    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, an oxide semiconductor layer provided between the first electrode and the second electrode, a gate electrode surrounding the oxide semiconductor layer, a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and separated from the first electrode, a first insulating layer provided between the first electrode and the gate electrode. The gate insulating layer is between first insulating layer and the oxide semiconductor layer, and a second insulating layer is provided between the first electrode and the first insulating layer. The second insulating layer has a chemical composition or density that is different from that of the first insulating layer.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20240324180A1

    公开(公告)日:2024-09-26

    申请号:US18609019

    申请日:2024-03-19

    CPC classification number: H10B12/33 H10B12/05

    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the electrodes; a gate electrode surrounding the oxide semiconductor layer; a gate insulating layer between the gate electrode and the oxide semiconductor layer and spaced from the first electrode; a first insulating layer between the first electrode and the gate electrode, the gate insulating layer between the first insulating layer and the oxide semiconductor layer; and an intermediate layer between the first electrode and the first insulating layer, including a first region and a second region between the first region and the first insulating layer. The first region contains a first metal element and oxygen, the second region contains a second metal element, and an oxygen concentration in the second region is lower than that in the first region.

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