公开(公告)号：USRE50330E1

公开(公告)日：2025-03-04

申请号：US17850399

申请日：2022-06-27

Applicant: Kioxia Corporation

Inventor： Ryota Katsumata ,  Hideaki Aochi ,  Hiroyasu Tanaka ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC: G11C11/14 ,  G11C16/04 ,  G11C16/06 ,  H10B43/10 ,  H10B43/20 ,  H10B43/27

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.

公开(公告)号：USRE49152E1

公开(公告)日：2022-07-26

申请号：US16926273

申请日：2020-07-10

Applicant: Kioxia Corporation

Inventor： Ryota Katsumata ,  Hideaki Aochi ,  Hiroyasu Tanaka ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC: G11C11/14 ,  H01L27/11578 ,  G11C16/04 ,  G11C16/06 ,  H01L27/11565 ,  H01L27/11582

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.

公开(公告)号：US11792992B2

公开(公告)日：2023-10-17

申请号：US17576164

申请日：2022-01-14

Applicant: Kioxia Corporation

Inventor： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC: H01L29/76 ,  H10B43/27 ,  H01L29/66 ,  H01L29/792 ,  H10B43/20 ,  H01L21/223 ,  H01L21/265 ,  H01L29/78 ,  H01L29/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

CPC classification number: H10B43/27 ,  H01L21/223 ,  H01L21/265 ,  H01L29/04 ,  H01L29/1037 ,  H01L29/16 ,  H01L29/42344 ,  H01L29/4916 ,  H01L29/66666 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/792 ,  H01L29/7926 ,  H10B43/20

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

公开(公告)号：US11257842B2

公开(公告)日：2022-02-22

申请号：US16849457

申请日：2020-04-15

Applicant: Kioxia Corporation

Inventor： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC: H01L29/76 ,  H01L27/11582 ,  H01L29/66 ,  H01L29/792 ,  H01L27/11578 ,  H01L21/223 ,  H01L21/265 ,  H01L29/78 ,  H01L29/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.