公开(公告)号：US20220108895A1

公开(公告)日：2022-04-07

申请号：US17463913

申请日：2021-09-01

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE

IPC: H01L21/48 ,  H01L21/768 ,  H01L21/321 ,  H01L21/02

Abstract: A method of manufacturing a semiconductor device, includes: alternately stacking a first film and a second film on a surface of a semiconductor substrate to form a multilayer film; partially removing the multilayer film to form stacks and a depression between one of the stacks and another one of the stacks and expose an end portion of the surface; forming a first insulating film to fill the depression; forming a first protective film on the stacks, the first insulating film, and the end portion; forming a second insulating film on the first protective film, the second insulating film overlapping at least a part of the other one of the stacks and the end portion; and removing the second insulating film in a thickness direction using chemical mechanical polishing.

公开(公告)号：US20220270993A1

公开(公告)日：2022-08-25

申请号：US17366262

申请日：2021-07-02

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE

IPC: H01L23/00

Abstract: In one embodiment, a semiconductor device includes a lower interconnect layer including a plurality of lower interconnects, and a plurality of lower pads provided on the lower interconnects. The device further includes a plurality of upper pads provided on the lower pads and being in contact with the lower pads, and an upper interconnect layer including a plurality of upper interconnects provided on the upper pads. The lower pads include a plurality of first pads and a plurality of second pads. The upper pads include a plurality of third pads provided on the second pads and a plurality of fourth pads provided on the first pads, a lower face of each third pad is larger in area than a upper face of each second pad, and a lower face of each fourth pad is smaller in area than a upper face of each first pad.

公开(公告)号：US20210280545A1

公开(公告)日：2021-09-09

申请号：US17009346

申请日：2020-09-01

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE

IPC: H01L23/00

Abstract: A semiconductor device according to an embodiment comprises a first chip and a second chip. The first chip includes a first wire, a first connection pad electrically connected to the first wire, and a first dummy pad. The second chip includes a second wire, a second connection pad electrically connected to the second wire and joined to the first connection pad, and a second dummy pad joined to the first dummy pad. A thickness of the first dummy pad is smaller than a thickness of the first connection pad and a thickness of the second dummy pad is also smaller than a thickness of the second connection pad, or the thickness of the first dummy pad is smaller than the thickness of the first connection pad or the thickness of the second dummy pad is smaller than the thickness of the second connection pad.

公开(公告)号：US20210074643A1

公开(公告)日：2021-03-11

申请号：US17004345

申请日：2020-08-27

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE ,  Yasuhito YOSHIMIZU

IPC: H01L23/538 ,  H01L27/11556 ,  H01L27/11582 ,  G11C5/02 ,  H01L21/768

Abstract: A semiconductor device according to one embodiment includes a substrate, a stacked body including conductive layers and insulating layers alternately stacked on the substrate, and first contact plugs individually connected to the conductive layers on an end of the stacked body. The semiconductor device includes, on the substrate, a lower layer three-dimensional structure including any of a lower layer inclined structure continuously inclined upward with respect to a flat surface of the substrate, a lower layer stepped structure inclined upward in a stepwise manner with respect to the flat surface, and a lower layer composite stepped structure in which planes parallel to the flat surface and slopes inclined upward with respect to the flat surface are alternately continuous. At least some of terrace regions being connection regions to the first contact plugs on top surfaces of the conductive layers are located on the lower layer three-dimensional structure.

公开(公告)号：US20240096659A1

公开(公告)日：2024-03-21

申请号：US18456652

申请日：2023-08-28

Applicant: Kioxia Corporation

Inventor： Fuyuma ITO ,  Jun TAKAGI ,  Ai MORI ,  Yosuke MARUYAMA ,  Yuya AKEBOSHI ,  Takashi WATANABE ,  Hiroyasu IIMORI

IPC: H01L21/67 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/67086 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/67051

Abstract: A substrate processing apparatus includes: a plurality of roller pairs configured to place a plurality of substrates, respectively, wherein the substrates are arranged side by side in a horizontal direction with a predetermined interval, and rotate the plurality of substrates, respectively, in a circumferential direction; a first, second, and third circulation groove that are disposed along outer peripheral portions of each of the plurality of substrates; a chemical solution supplier configured to supply a chemical solution to the outer peripheral portions of the plurality of substrates through the first circulation groove; a rinse solution supplier configured to supply a rinse solution to the outer peripheral portions of the plurality of substrates through the second circulation groove; and a fluid supplier configured to supply a fluid for drying the rinse solution to the outer peripheral portions of the plurality of substrates through the third circulation groove.

公开(公告)号：US20230290648A1

公开(公告)日：2023-09-14

申请号：US17897127

申请日：2022-08-27

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE

IPC: H01L21/463 ,  H01L21/477 ,  B24B1/00 ,  H01L21/67

CPC classification number: H01L21/463 ,  H01L21/477 ,  B24B1/00 ,  H01L21/67115 ,  H01L21/67103

Abstract: A semiconductor manufacturing apparatus is a semiconductor manufacturing apparatus for holding a polishing object on a polishing head and polishing a surface of the polishing object. The semiconductor manufacturing apparatus includes a plurality of laser irradiation parts on the polishing head. At least one of the laser irradiation parts is a laser irradiation part configured to radiate a laser beam toward the back surface side of the polishing object.

公开(公告)号：US20210280561A1

公开(公告)日：2021-09-09

申请号：US17120514

申请日：2020-12-14

Applicant: Kioxia Corporation

Inventor： Takashi WATANABE

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/544 ,  H01L25/00

Abstract: A semiconductor device according to the present embodiment includes a first chip and a second chip. A first pad is disposed so as to be exposed from a first region on a first surface. A first mark is provided by a first pattern and is disposed so as to be exposed from a second region. The second chip includes a second substrate, a second wire, a second pad, and a second mark. The second wire is disposed on the second substrate. The second pad is disposed so as to be exposed from a third region on a second surface, and is electrically connected to the second wire and the first pad. The second mark is provided by a second pattern corresponding to the first pattern, is disposed so as to be exposed from a fourth region, and has a thinner thickness than the second pad.