公开(公告)号：US07386634B2

公开(公告)日：2008-06-10

申请号：US10670300

申请日：2003-09-26

申请人： Kohei Murayama ,  Takafumi Fujiwara

发明人： Kohei Murayama ,  Takafumi Fujiwara

IPC分类号： G06F3/00 ,  G06F13/00 ,  G06F1/00

CPC分类号： G06F13/4022 ,  G06F13/4217

摘要： In a bus, which is provided with a switch having a plurality of master ports and a plurality of slave ports and can connect each of the plurality of master ports to an arbitrary port of the plurality of slave ports, an address phase that issues an address and a command and a data phase that issues write data are separated, and an address phase of next transaction can be issued before the data phase is completed. This improves performance of a system, in which a plurality of master modules and slave modules are connected through the bus.

摘要翻译： 在总线中设置有具有多个主端口和多个从端口的交换机，并且可以将多个主端口中的每一个连接到多个从端口的任意端口，发出地址的地址阶段 并且发出写入数据的命令和数据阶段被分离，并且可以在数据阶段完成之前发出下一个事务的地址阶段。 这提高了通过总线连接多个主模块和从模块的系统的性能。

公开(公告)号：US07532739B2

公开(公告)日：2009-05-12

申请号：US11464889

申请日：2006-08-16

申请人： Takafumi Fujiwara

发明人： Takafumi Fujiwara

IPC分类号： G06K9/36

CPC分类号： H04N1/00838 ,  H04N1/00883 ,  H04N1/32128

摘要： An image processing apparatus includes a production unit that can produce data by putting original image data into a first region and copy-forgery-inhibited-pattern image data into a second region, and a processing unit that can perform predetermined processing to the original image data put in the first region. The image processing apparatus further includes a composite image data producing unit that can produce composite image data based on both of the original image data to which the predetermined processing is performed and the copy-forgery-inhibited-pattern image data put in the second region of the data.

摘要翻译： 一种图像处理装置包括：生产单元，其可以通过将原始图像数据放入第一区域和禁止复制伪造图案图像数据到第二区域中来产生数据;以及处理单元，其可以对原始图像数据执行预定处理 放在第一个地区。 该图像处理装置还包括合成图像数据产生单元，其可以基于执行预定处理的原始图像数据和放置在第二区域中的禁止复制伪造图案数据的两者来产生合成图像数据 数据。

公开(公告)号：US07447849B2

公开(公告)日：2008-11-04

申请号：US11378002

申请日：2006-03-17

申请人： Keigo Ogura ,  Takafumi Fujiwara

发明人： Keigo Ogura ,  Takafumi Fujiwara

IPC分类号： G06F12/00

CPC分类号： G06F13/1689

摘要： A memory system includes a memory and a plurality of memory controllers for accessing the memory. One of the plurality of memory controllers synchronizes the one of the plurality of memory controllers with the plurality of memory controllers.

摘要翻译： 存储器系统包括用于访问存储器的存储器和多个存储器控制器。 多个存储器控制器中的一个将多个存储器控制器中的一个与多个存储器控制器同步。

公开(公告)号：US06708236B1

公开(公告)日：2004-03-16

申请号：US09492518

申请日：2000-01-27

申请人： Atsushi Date ,  Katsunori Kato ,  Noboru Yokoyama ,  Tadaaki Maeda ,  Takafumi Fujiwara

发明人： Atsushi Date ,  Katsunori Kato ,  Noboru Yokoyama ,  Tadaaki Maeda ,  Takafumi Fujiwara

IPC分类号： G06F1300

CPC分类号： H04N1/0083 ,  H04N1/32561 ,  H04N1/32593 ,  H04N1/32603 ,  H04N2201/0091 ,  H04N2201/0093

摘要： Bus control apparatus solves the problem that a high-speed bus which supports only burst transfer cannot be used when the boundary of a transfer memory address is not coincident with a unit boundary. A scanner controller and printer controller connected to a G bus capable of performing only burst transfer and a B bus capable of performing even single transfer determine from the address and data length of data to be transferred whether the data does not match the memory boundary. If the data does not match this boundary, a data portion which is not accommodated within the burst transfer unit is single-transferred using the B bus. A data portion which is accommodated within the burst transfer unit is burst-transferred using the G bus.

摘要翻译： 总线控制装置解决了当传输存储器地址的边界与单位边界不一致时不能使用仅支持突发传输的高速总线的问题。 连接到能够执行突发传输的G总线的扫描器控制器和打印机控制器以及能够执行甚至单次传输的B总线根据要传送的数据的地址和数据长度确定数据是否与存储器边界不匹配。 如果数据与该边界不匹配，则使用B总线单独传送不容纳在突发传送单元内的数据部分。 使用G总线突发传送容纳在突发传送单元内的数据部分。

公开(公告)号：US07848539B2

公开(公告)日：2010-12-07

申请号：US12419190

申请日：2009-04-06

申请人： Takafumi Fujiwara

发明人： Takafumi Fujiwara

IPC分类号： G06K9/36

CPC分类号： H04N1/00838 ,  H04N1/00883 ,  H04N1/32128

摘要： An image processing apparatus includes a production unit that can produce data by putting original image data into a first region and copy-forgery-inhibited-pattern image data into a second region, and a processing unit that can perform predetermined processing to the original image data put in the first region. The image processing apparatus further includes a composite image data producing unit that can produce composite image data based on both of the original image data to which the predetermined processing is performed and the copy-forgery-inhibited-pattern image data put in the second region of the data.

摘要翻译： 一种图像处理装置包括：生产单元，其可以通过将原始图像数据放入第一区域和禁止复制伪造图案图像数据到第二区域中来产生数据;以及处理单元，其可以对原始图像数据执行预定处理 放在第一个地区。 该图像处理装置还包括合成图像数据产生单元，其可以基于执行预定处理的原始图像数据和放置在第二区域中的禁止复制伪造图案数据的两者来产生合成图像数据 数据。

公开(公告)号：US07724388B2

公开(公告)日：2010-05-25

申请号：US11380100

申请日：2006-04-25

申请人： Takafumi Fujiwara

发明人： Takafumi Fujiwara

IPC分类号： G06F3/12 ,  G06F13/00 ,  G06F3/00 ,  H04N1/393

CPC分类号： H04N1/32577 ,  G06F3/1204 ,  G06F3/1212 ,  G06F3/1229 ,  G06F3/1236 ,  G06F3/1279 ,  H04N1/00204 ,  H04N1/0083 ,  H04N1/32561 ,  H04N1/32582 ,  H04N1/32587 ,  H04N1/32593 ,  H04N1/32598 ,  H04N1/32603 ,  H04N2201/0081 ,  H04N2201/0082 ,  H04N2201/0086 ,  H04N2201/0094

摘要： An image input/output control apparatus includes a control device for controlling input/output of image data with an external apparatus, plural image processing devices for performing predetermined image processes to the image data, and plural data transfer devices for connecting each of the plural image processing devices and the control device like a ring and performing data transfer among them. The plural image processing devices and the control device are composed respectively on different units, whereby the structure of the apparatus can be easily changed, and a decrease in processing speed due to the competition for buses can be reduced without increasing the number of parts necessary for bus control.

摘要翻译： 图像输入/输出控制装置包括用于通过外部设备控制图像数据的输入/输出的控制装置，用于对图像数据执行预定图像处理的多个图像处理装置和用于连接多个图像中的每一个的多个数据传送装置 处理设备和控制设备，如环，并执行数据传输。 多个图像处理装置和控制装置分别在不同的单元上组成，从而可以容易地改变装置的结构，并且可以减少由于对总线的竞争而导致的处理速度的降低，而不增加对于 总线控制。

公开(公告)号：US20070047825A1

公开(公告)日：2007-03-01

申请号：US11464889

申请日：2006-08-16

申请人： Takafumi Fujiwara

发明人： Takafumi Fujiwara

IPC分类号： G06K9/36

CPC分类号： H04N1/00838 ,  H04N1/00883 ,  H04N1/32128

摘要： An image processing apparatus includes a production unit that can produce data by putting original image data into a first region and copy-forgery-inhibited-pattern image data into a second region, and a processing unit that can perform predetermined processing to the original image data put in the first region. The image processing apparatus further includes a composite image data producing unit that can produce composite image data based on both of the original image data to which the predetermined processing is performed and the copy-forgery-inhibited-pattern image data put in the second region of the data.

摘要翻译： 一种图像处理装置包括：生产单元，其可以通过将原始图像数据放入第一区域和禁止复制伪造图案图像数据到第二区域中来产生数据;以及处理单元，其可以对原始图像数据执行预定处理 放在第一个地区。 该图像处理装置还包括合成图像数据产生单元，其可以基于执行预定处理的原始图像数据和放置在第二区域中的禁止复制伪造图案数据的两者来产生合成图像数据 数据。

公开(公告)号：US06499076B2

公开(公告)日：2002-12-24

申请号：US09917715

申请日：2001-07-31

申请人： Atsushi Date ,  Katsunori Kato ,  Noboru Yokoyama ,  Tadaaki Maeda ,  Takafumi Fujiwara

发明人： Atsushi Date ,  Katsunori Kato ,  Noboru Yokoyama ,  Tadaaki Maeda ,  Takafumi Fujiwara

IPC分类号： G06F100

CPC分类号： G06F13/364

摘要： A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

摘要翻译： 来自CPU的AP总线，来自系统存储器的MC总线，连接有输入/输出设备的IO总线和用于传送扫描器/打印机控制器的图像数据的G总线连接到系统总线桥（ SBB）。 SBB根据主机的请求，将任何一个P总线，G总线和IO总线作为主机和任何一个MC总线和IO总线作为从机连接。 此时，P总线和IO总线可以与G总线和MC总线并联连接。 因此，可以使用CPU的输入/输出设备并行地执行扫描器/打印机控制器对存储器的访问。 这使得可以有效地处理诸如图像数据的大量数据。

公开(公告)号：US08384972B2

公开(公告)日：2013-02-26

申请号：US11380106

申请日：2006-04-25

申请人： Takafumi Fujiwara ,  Atsushi Date

发明人： Takafumi Fujiwara ,  Atsushi Date

IPC分类号： H04N1/46 ,  H04N1/00

CPC分类号： H04N1/32577 ,  G06F3/1204 ,  G06F3/1212 ,  G06F3/1229 ,  G06F3/1236 ,  G06F3/1279 ,  H04N1/00204 ,  H04N1/0083 ,  H04N1/32561 ,  H04N1/32582 ,  H04N1/32587 ,  H04N1/32593 ,  H04N1/32598 ,  H04N1/32603 ,  H04N2201/0081 ,  H04N2201/0082 ,  H04N2201/0086 ,  H04N2201/0094

摘要： An image input/output control apparatus includes a control device for controlling input/output of image data with an external apparatus, plural image processing devices for performing predetermined image processes to the image data, and plural data transfer devices for connecting each of the plural image processing devices and the control device like a ring and performing data transfer among them. The plural image processing devices and the control device are composed respectively on different units, whereby the structure of the apparatus can be easily changed, and a decrease in processing speed due to the competition for buses can be reduced without increasing the number of parts necessary for bus control.

公开(公告)号：US07380034B2

公开(公告)日：2008-05-27

申请号：US11110667

申请日：2005-04-21

申请人： Takafumi Fujiwara ,  Katsunori Kato ,  Noboru Yokoyama ,  Atsushi Date ,  Tadaaki Maeda

发明人： Takafumi Fujiwara ,  Katsunori Kato ,  Noboru Yokoyama ,  Atsushi Date ,  Tadaaki Maeda

IPC分类号： G06F13/00

CPC分类号： G06F13/3625 ,  G06F13/364

摘要： In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.

摘要翻译： 在连接到总线的多个主设备中，当需要使用总线时，主设备向仲裁器发出请求使用总线经过预定间隔的请求信号，而另一个主设备发出请求信号 仲裁器，当需要使用总线时，立即请求使用总线的请求信号。 仲裁器授权通过同样处理来自主设备的请求信号来使用总线的权利。 还准备了表示总线中的业务的信号，并且在高业务量的情况下经过间隔后发出请求信号，但是在流量低的情况下立即发出请求信号。 因此，可以详细地调整使用权的实际优先级，或者通过存在或不存在这样的间隔或其长度来动态地改变这种优先级。