公开(公告)号：US06546471B1

公开(公告)日：2003-04-08

申请号：US09506810

申请日：2000-02-18

申请人： Toshiaki Tarui ,  Koichi Okazawa ,  Yasuyuki Okada ,  Toru Shonai ,  Toshio Okochi ,  Hideya Akashi

发明人： Toshiaki Tarui ,  Koichi Okazawa ,  Yasuyuki Okada ,  Toru Shonai ,  Toshio Okochi ,  Hideya Akashi

IPC分类号： G06F1314

CPC分类号： G06F12/0826 ,  G06F12/0284 ,  G06F2212/2542

摘要： A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is “0”, a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers. The command of access to the shared area is multicast to all of the nodes, whereas the command is multicast only to the nodes within the corresponding partition when the local area is accessed.

摘要翻译： 共享存储器多处理器（SMP）具有对包括在特定节点中的主存储器的有效访问以及包括节点的分区的管理。 与包含在节点中的主存储器的每页对应，存储在寄存器中的位指示是否已经从任何其他节点访问了页面。 在比特为“0”的情况下，不发送要发送到其他节点的高速缓存相干命令。 该位在初始化和内存分配时由软件复位，当从任何其他节点访问主存储器的页面时，该位由硬件置1。 在将SMP的内部划分成分区的情况下，将各节点的主存储器划分为本地区域和共享区域，分别分别分配地址。 在每个节点中，共享区域和局部区域的配置信息项存储在寄存器中。 访问共享区域的命令是组播到所有节点，而当访问本地区域时，该命令仅组播到相应分区内的节点。

公开(公告)号：US06378021B1

公开(公告)日：2002-04-23

申请号：US09250155

申请日：1999-02-16

申请人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

发明人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

IPC分类号： G06F1300

CPC分类号： H04L41/069 ,  G06F15/17375 ,  H04L41/0672 ,  H04L43/0811 ,  H04L49/101 ,  H04L49/201 ,  H04L49/254 ,  H04L49/552

摘要： In an information processing apparatus having a crossbar switch, registers are provided for logical division of a connection of the crossbar switch into a plurality of groups, in order to allow a system to change the group division configuration while the system is in an ordinary operation. As an application of this, in a hot standby system, when a fault occurs in an active partition and the active partition is replaced by a standby partition, the standby partition is allowed to include system resources used by the active partition such as CPU's and memories.

摘要翻译： 在具有交叉开关的信息处理装置中，提供寄存器用于将交叉开关的连接逻辑划分成多个组，以便允许系统在系统处于普通操作时改变组划分配置。 作为应用，在热备份系统中，当在活动分区中发生故障并且活动分区被备用分区替换时，备用分区被允许包括活动分区所使用的系统资源，例如CPU和存储器 。

公开(公告)号：US6131169A

公开(公告)日：2000-10-10

申请号：US460513

申请日：1999-12-14

申请人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

发明人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

IPC分类号： G06F13/36 ,  G06F11/00 ,  G06F11/20 ,  G06F15/167

CPC分类号： G06F11/2005 ,  G06F11/2007

摘要： An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.

摘要翻译： 一种信息处理设备，包括具有用于数据传送的多个切换电路的交叉开关; 具有连接到开关电路的每个输入/输出端口的m位单元的地址数据传送路径的连接线，连接到控制电路的每个输入/输出端口的m位单元的控制信号传送路径和后面 - 连接到备用电路的每个输入/输出端口的m位单元的传送路径; 以及传送路径处理电路，其对应于由在每个处理单元上提供的n位构成的连接线，通过开关电路和交叉开关中的控制电路在处理单元之间监视的数据传输和控制信号，以及 检测到至少开关电路和控制电路的故障，从而将故障切换电路和控制电路中的至少一个的连接改变为备用电路的连接。

公开(公告)号：US6088770A

公开(公告)日：2000-07-11

申请号：US30957

申请日：1998-02-26

申请人： Toshiaki Tarui ,  Koichi Okazawa ,  Yasuyuki Okada ,  Toru Shonai ,  Toshio Okochi ,  Hideya Akashi

发明人： Toshiaki Tarui ,  Koichi Okazawa ,  Yasuyuki Okada ,  Toru Shonai ,  Toshio Okochi ,  Hideya Akashi

IPC分类号： G06F15/177 ,  G06F12/02 ,  G06F12/08 ,  G06F15/17 ,  G06F13/14

CPC分类号： G06F12/0826 ,  G06F12/0284 ,  G06F2212/2542

摘要： A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is "0", a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers. The command of access to the shared area is multicast to all of the nodes, whereas the command is multicast only to the nodes within the corresponding partition when the local area is accessed.

公开(公告)号：US6035414A

公开(公告)日：2000-03-07

申请号：US962683

申请日：1997-11-03

申请人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

发明人： Koichi Okazawa ,  Toshiaki Tarui ,  Yasuyuki Okada

IPC分类号： G06F13/36 ,  G06F11/00 ,  G06F11/20 ,  G06F15/167

CPC分类号： G06F11/2005 ,  G06F11/2007

摘要： An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.

公开(公告)号：US09065728B2

公开(公告)日：2015-06-23

申请号：US13819563

申请日：2011-03-03

申请人： Isao Shimokawa ,  Toshiaki Tarui ,  Hiroki Miyamoto ,  Tomohiro Baba

发明人： Isao Shimokawa ,  Toshiaki Tarui ,  Hiroki Miyamoto ,  Tomohiro Baba

IPC分类号： H04L12/24 ,  H04L12/26 ,  H04L12/703

CPC分类号： H04L41/06 ,  H04L41/0631 ,  H04L41/142 ,  H04L45/28

摘要： Systems, methods and devices for failure analysis are provided. Using aggregation flow mining (AFM) or a similar method, an integrated mining of flow (IMF) acquires, from each router to be tested, information relating to each flow. The IMF, in relation to each of the routers, obtains distributions of statistical information such as throughput or difference for each flow; calculates, in relation to each of the distributions, a Mahalanobis distance in relation to the expected value of a reference distribution; and makes a comprehensive assessment of the distributions to perform a fault determination. When the fault determination is performed, a normal value of the distribution used for comparison is acquired from AFM and updated through feedback as needed. After the results of fault determination relating to other routers are assessed, the expected value of the standard deviation and the average value of the reference distribution used for comparison are updated.

摘要翻译： 提供了故障分析的系统，方法和设备。 使用聚合流挖掘（AFM）或类似方法，流的综合挖掘（IMF）从每个待测试的路由器获取与每个流相关的信息。 IMF与每个路由器相关，获得统计信息的分布，例如每个流的吞吐量或差异; 相对于每个分布计算与参考分布的期望值相关的马氏距离; 并对分布进行综合评估，以进行故障确定。 当执行故障确定时，从AFM获取用于比较的分布的正常值，并根据需要通过反馈进行更新。 在评估与其他路由器相关的故障确定结果之后，更新用于比较的标准偏差的预期值和参考分布的平均值。

公开(公告)号：US20070277046A1

公开(公告)日：2007-11-29

申请号：US11753796

申请日：2007-05-25

申请人： Yoshiko Yasuda ,  Takashige Baba ,  Jun Okitsu ,  Toshiaki Tarui

发明人： Yoshiko Yasuda ,  Takashige Baba ,  Jun Okitsu ,  Toshiaki Tarui

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3209

摘要： To provide a power management method for an information platform, including: holding system configuration information indicating a correspondence between a logical system and a processing module constituting the logical system; holding power management information indicating a correspondence between information with which a type of the logical system can be specified, an operating condition of the logical system, and first power consumption for operating the logical system; selecting, the processing module which constitutes the logical system specified by a configuration request by referring to the system configuration information when receiving the configuration request of the logical system; calculating the first power consumption for operating the logical system based on the type and the operating condition included in the configuration request, and the power management information; and determining second power consumption to be supplied to the processing module based on the calculated first power consumption and information on the processing modules.

摘要翻译： 提供一种用于信息平台的电源管理方法，包括：保持指示逻辑系统和构成逻辑系统的处理模块之间的对应关系的系统配置信息; 保持表示可以指定逻辑系统的类型的信息与逻辑系统的运行状态和操作逻辑系统的第一功耗之间的对应关系的功率管理信息; 在接收到逻辑系统的配置请求时，通过参考系统配置信息来选择构成由配置请求指定的逻辑系统的处理模块; 基于配置请求中包括的类型和操作条件以及电源管理信息，计算用于操作逻辑系统的第一功耗; 以及基于所计算的第一功率消耗和关于处理模块的信息来确定要提供给处理模块的第二功率消耗。

公开(公告)号：US20070067432A1

公开(公告)日：2007-03-22

申请号：US11490141

申请日：2006-07-21

申请人： Toshiaki Tarui ,  Yoshiko Yasuda

发明人： Toshiaki Tarui ,  Yoshiko Yasuda

IPC分类号： G06F15/173

CPC分类号： G06F13/4027

摘要： A computer system reduces an overhead by using an I/O switch high in versatility when realizing the sharing of an I/O between virtual computers. The system includes a CPU module #0 having plural CPU cores, an AS bridge 15 connected to the CPU cores, and a main memory that can be accessed from the CPU cores or the AS bridge 15, and AS switches SW0 and SW1 that connect the AS bridge 15 of the CPU module #0 and an I/O blade #5. The CPU module #0 has a hypervisor that divides the plural CPU cores and the main memory into plural logical partitions, and the AS bridge 15 adds virtual path information set in each of the logical partitions and path information of from the AS bridge 15 to the I/O blade #5 to the path information of the AS packet to switch over the AS packet between each of the logical partitions and the I/O blade #5 when relaying the AS packet transmitted or received between the logical partitions and the I/O blade #5.

摘要翻译： 当实现虚拟计算机之间的I / O共享时，计算机系统通过使用具有多功能性的I / O开关来减少开销。 该系统包括具有多个CPU核心的CPU模块＃0，连接到CPU核心的AS桥15以及可以从CPU核心或AS桥接器15访问的主存储器以及可以从CPU核心或AS桥接器15访问的主存储器以及AS开关SW 0和SW 1， 连接CPU模块＃0的AS桥15和I / O刀片＃5。CPU模块＃0具有将多个CPU内核和主存储器分割成多个逻辑分区的管理程序，AS桥15将虚拟 将从AS桥15到I / O刀片＃5的每个逻辑分区和路径信息中设置的路径信息设置为AS分组的路径信息，以切换每个逻辑分区与I / O刀片＃5在中继逻辑分区与I / O刀片＃5之间发送或接收的AS数据包时。

公开(公告)号：US20050038890A1

公开(公告)日：2005-02-17

申请号：US10782971

申请日：2004-02-23

申请人： Mineyoshi Masuda ,  Toshiaki Tarui ,  Tatsuo Higuchi

发明人： Mineyoshi Masuda ,  Toshiaki Tarui ,  Tatsuo Higuchi

IPC分类号： H04L29/06 ,  H04L29/08 ,  G06F15/16 ,  G06F15/173

CPC分类号： H04L67/1008 ,  H04L29/06 ,  H04L67/1002 ,  H04L67/1023 ,  H04L2029/06054

摘要： A load distribution method is adopted by a client-server system comprising a plurality of clients 100 and a server cluster 1100, which includes a plurality of servers 800 each used for processing requests made by the clients 100 and allows the number of the servers 800 to be changed dynamically. Each of the clients 100 detects the number of servers 800 composing the server cluster 1100, sets an allocation of requests transmissible out to a newly added server 900 at a value small in comparison with that set for each of the other servers 800 right after detecting an increase in server count and then transmits out requests to the servers on the basis of the set allocation. It is thus possible to provide the clients 100 and the server-cluster system 1100 with the load distribution method suitable for a cluster reconfiguration technology for changing the number of servers composing the server-cluster system 1100 in accordance with an increase and a decrease in demand for a service.

摘要翻译： 包括多个客户机100和服务器集群1100的客户端 - 服务器系统采用负载分配方法，其包括多个服务器800，每个服务器800用于处理由客户端100做出的请求，并且允许服务器800的数量 动态变化。 每个客户端100检测组成服务器集群1100的服务器800的数量，将传输的请求的分配设置为与在针对每个其他服务器800的检测到 增加服务器数量，然后根据设置的分配向服务器发出请求。 因此，可以向客户端100和服务器集群系统1100提供适合于集群重新配置技术的负载分配方法，用于根据需求的增加和减少来改变组成服务器集群系统1100的服务器的数量 为了服务。

公开(公告)号：US08095701B2

公开(公告)日：2012-01-10

申请号：US11490141

申请日：2006-07-21

申请人： Toshiaki Tarui ,  Yoshiko Yasuda

发明人： Toshiaki Tarui ,  Yoshiko Yasuda

IPC分类号： G06F13/10

CPC分类号： G06F13/4027

摘要： A computer system reduces an overhead by using an I/O switch high in versatility when realizing the sharing of an I/O between virtual computers. The system includes a CPU module #0 having plural CPU cores, an AS bridge 15 connected to the CPU cores, and a main memory that can be accessed from the CPU cores or the AS bridge 15, and AS switches SW0 and SW1 that connect the AS bridge 15 of the CPU module #0 and an I/O blade #5. The CPU module #0 has a hypervisor that divides the plural CPU cores and the main memory into plural logical partitions, and the AS bridge 15 adds virtual path information set in each of the logical partitions and path information of from the AS bridge 15 to the I/O blade #5 to the path information of the AS packet to switch over the AS packet between each of the logical partitions and the I/O blade #5 when relaying the AS packet transmitted or received between the logical partitions and the I/O blade #5.

摘要翻译： 当实现虚拟计算机之间的I / O共享时，计算机系统通过使用具有多功能性的I / O开关来减少开销。 该系统包括具有多个CPU核心的CPU模块＃0，连接到CPU核心的AS桥15以及可以从CPU核心或AS桥接器15访问的主存储器以及连接到CPU核心的AS开关SW0和SW1 CPU模块＃0的AS桥15和I / O刀片＃5。 CPU模块＃0具有管理程序，其将多个CPU核心和主存储器分割成多个逻辑分区，并且AS桥接器15将设置在每个逻辑分区中的虚拟路径信息和从AS桥15的路径信息添加到 I / O刀片＃5到AS分组的路径信息，以在中继在逻辑分区和I / O刀片＃5之间发送或接收的AS分组时在每个逻辑分区和I / O刀片＃5之间切换AS分组， O刀片＃5。