公开(公告)号：US08154026B2

公开(公告)日：2012-04-10

申请号：US12097019

申请日：2006-12-13

申请人： Ryosuke Ishii ,  Koji Nakayama ,  Yoshitaka Sugawara ,  Toshiyuki Miyanagi ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Tomonori Nakamura

发明人： Ryosuke Ishii ,  Koji Nakayama ,  Yoshitaka Sugawara ,  Toshiyuki Miyanagi ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Tomonori Nakamura

IPC分类号： H01L29/15

CPC分类号： H01L29/1604 ,  H01L21/0465 ,  H01L21/047 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/8613

摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.

摘要翻译： 在具有由SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台阶结构的SiC双极型半导体器件中，形成 防止堆垛层错及其面积的膨胀，从而防止正向电压的增加。 此外，提高了反向偏置中的耐受电压的特性。 在台面壁或台面壁和台面周边上形成正向操作降解防止层，以在空间上分离台面壁的表面与pn结界面。 在一个实施例中，正向操作降解防止层由在施加反向电压期间具有等电位的第二导电类型的碳化硅低电阻层构成。 在另一个实施方案中，正向操作降解防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间具有等电位的金属层形成在碳化硅导电层的表面上 。 在另一个实施方案中，正向操作降解防止层由高电阻非晶层组成。

公开(公告)号：US07960737B2

公开(公告)日：2011-06-14

申请号：US12801679

申请日：2010-06-21

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

公开(公告)号：US07960257B2

公开(公告)日：2011-06-14

申请号：US12801680

申请日：2010-06-21

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

摘要翻译： 为了防止由于使用碳化硅半导体的双极性半导体器件随时间的变化引起的正向电压的增加，缓冲层，漂移层和其他p型和n型半导体层形成在 生长表面，其由具有偏角角度的硅碳化物半导体的晶体的表面给出; （000-1）碳表面8度，以每小时薄膜增加率为10μm/小时的膜生长速率，比常规对应物高3倍以上。 硅烷和丙烷材料气体和掺杂气体的流速大大增加，以提高膜生长速率。

公开(公告)号：US07960738B2

公开(公告)日：2011-06-14

申请号：US12801681

申请日：2010-06-21

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

公开(公告)号：US20100258817A1

公开(公告)日：2010-10-14

申请号：US12801681

申请日：2010-06-21

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L29/24

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

公开(公告)号：US20090045413A1

公开(公告)日：2009-02-19

申请号：US12097019

申请日：2006-12-13

申请人： Ryosuke Ishii ,  Koji Nakayama ,  Yoshitaka Sugawara ,  Toshiyuki Miyanagi ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Tomonori Nakamura

发明人： Ryosuke Ishii ,  Koji Nakayama ,  Yoshitaka Sugawara ,  Toshiyuki Miyanagi ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Tomonori Nakamura

IPC分类号： H01L29/24

CPC分类号： H01L29/1604 ,  H01L21/0465 ,  H01L21/047 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/8613

摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.

摘要翻译： 在具有由SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台阶结构的SiC双极型半导体器件中，形成 防止堆垛层错及其面积的膨胀，从而防止正向电压的增加。 此外，提高了反向偏置中的耐受电压的特性。 在台面壁或台面壁和台面周边上形成正向操作降解防止层，以在空间上分离台面壁的表面与pn结界面。 在一个实施例中，正向操作降解防止层由在施加反向电压期间具有等电位的第二导电类型的碳化硅低电阻层构成。 在另一个实施方案中，正向操作降解防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间具有等电位的金属层形成在碳化硅导电层的表面上 。 在另一个实施方案中，正向操作降解防止层由高电阻非晶层组成。

公开(公告)号：US20100261333A1

公开(公告)日：2010-10-14

申请号：US12801680

申请日：2010-06-21

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L21/04 ,  H01L21/304

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

公开(公告)号：US07768017B2

公开(公告)日：2010-08-03

申请号：US10581247

申请日：2004-12-01

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

摘要翻译： 为了防止由于使用碳化硅半导体的双极性半导体器件随时间的变化引起的正向电压的增加，缓冲层，漂移层和其他p型和n型半导体层形成在 生长表面，其由具有偏角角度的硅碳化物半导体的晶体的表面给出; （000-1）碳表面8度，以每小时薄膜增加率为10μm/小时的膜生长速率，比常规对应物高3倍以上。 硅烷和丙烷材料气体和掺杂气体的流速大大增加，以提高膜生长速率。

公开(公告)号：US20070290211A1

公开(公告)日：2007-12-20

申请号：US10594045

申请日：2005-03-25

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/302 ,  H01L21/331 ,  H01L21/336 ,  H01L29/73 ,  H01L29/78 ,  H01L29/861

CPC分类号： H01L29/8613 ,  H01L21/02019 ,  H01L21/02024 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/02661

摘要： A process for manufacturing a bipolar type semiconductor device in which at least a part of a region where an electron and a hole are recombined during current flowing is formed with a silicon carbide epitaxial layer that has been grown from the surface of a silicon carbide substrate, is characterized by that the surface of the silicon carbide substrate is treated by hydrogen etching and the epitaxial layer is then formed by the epitaxial growth of silicon carbide from the treated surface. A propagation of a basal plane dislocation to the epitaxial layer can be further reduced by treating the surface of the silicon carbide substrate by using chemical mechanical polishing and hydrogen etching in this order.

摘要翻译： 一种用于制造双极型半导体器件的方法，其中在电流流动期间电子和空穴复合的区域的至少一部分由从碳化硅衬底的表面生长的碳化硅外延层形成， 其特征在于，通过氢蚀刻处理碳化硅衬底的表面，然后通过从处理过的表面外延生长碳化硅形成外延层。 通过使用化学机械抛光和氢蚀刻依次处理碳化硅衬底的表面，可以进一步减少基面平面位错到外延层的传播。

公开(公告)号：US20070090370A1

公开(公告)日：2007-04-26

申请号：US10581247

申请日：2004-12-01

申请人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

发明人： Koji Nakayama ,  Yoshitaka Sugawara ,  Katsunori Asano ,  Hidekazu Tsuchida ,  Isaho Kamata ,  Toshiyuki Miyanagi ,  Tomonori Nakamura

IPC分类号： H01L31/0312

CPC分类号： H01L29/868 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/73 ,  H01L29/7397

摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

摘要翻译： 为了防止由于使用碳化硅半导体的双极性半导体器件随时间的变化引起的正向电压的增加，缓冲层，漂移层和其他p型和n型半导体层形成在 生长表面，其具有距离晶体的（000-1）碳表面具有8度偏离角度的碳化硅半导体的晶体表面，膜厚度为膜厚度 每小时h的增加速率为10mum / h，是传统方式的三倍或更高。 硅烷和丙烷材料气体和掺杂气体的流速大大增加，以提高膜生长速率。