公开(公告)号：US20120292587A1

公开(公告)日：2012-11-22

申请号：US13424880

申请日：2012-03-20

申请人： Kouji MATSUO ,  Noritake OHMACHI ,  Tomotaka ARIGA ,  Junichi WADA ,  Yoshio OZAWA

发明人： Kouji MATSUO ,  Noritake OHMACHI ,  Tomotaka ARIGA ,  Junichi WADA ,  Yoshio OZAWA

IPC分类号： H01L47/00

CPC分类号： H01L45/08 ,  H01L27/2463 ,  H01L45/1266 ,  H01L45/146

摘要： According to one embodiment, a nonvolatile memory device includes a memory cell. The memory cell includes a stacked film structure. The stacked film structure is capable of maintaining a first state or a second state. The first state includes a lower electrode film, a first memory element film provided on the lower electrode film and containing a first oxide and an upper electrode film provided on the first memory element film. The second state includes the lower electrode film, the first memory element film provided on the lower electrode film, a second memory element film provided on the first memory element film and containing a second oxide and the upper electrode film provided on the second memory element film.

摘要翻译： 根据一个实施例，非易失性存储器件包括存储单元。 存储单元包括层叠膜结构。 层叠膜结构能够保持第一状态或第二状态。 第一状态包括下电极膜，设置在下电极膜上并包含设置在第一存储元件膜上的第一氧化物和上电极膜的第一存储元件膜。 第二状态包括下电极膜，设置在下电极膜上的第一存储元件膜，设置在第一存储元件膜上并包含第二氧化物的第二存储元件膜，以及设置在第二存储元件膜上的上电极膜 。

公开(公告)号：US20100197130A1

公开(公告)日：2010-08-05

申请号：US12755532

申请日：2010-04-07

申请人： Yoshio OZAWA ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

发明人： Yoshio OZAWA ,  Isao Kamioka ,  Junichi Shiozawa ,  Akihito Yamamoto ,  Ryota Fujitsuka ,  Yoshihiro Ogawa ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Masayuki Tanaka ,  Daisuke Nishida

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.

摘要翻译： 一种半导体存储器件制造方法，包括在半导体衬底上形成浮置栅电极，在浮置栅电极上形成电极间绝缘膜，通过第一自由基氮化在电极间绝缘膜的表面上形成第一自由基氮化物膜， 第一自由基氮化物膜上的控制栅电极。

公开(公告)号：US20090261403A1

公开(公告)日：2009-10-22

申请号：US12406841

申请日：2009-03-18

申请人： Katsuyuki SEKINE ,  Yoshio OZAWA

发明人： Katsuyuki SEKINE ,  Yoshio OZAWA

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/66833

摘要： A semiconductor device includes a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first lower insulating film, a first upper insulating film provided on the first intermediate insulating film, and a first gate electrode provided on the first upper insulating film, and a select transistor including a second lower insulating film provided on the semiconductor substrate, a second intermediate insulating film provided on the second lower insulating film, a second upper insulating film provided on the second intermediate insulating film, and a second gate electrode provided on the second upper insulating film, wherein trap density of the second intermediate insulating film is lower than that of the first intermediate insulating film.

摘要翻译： 半导体器件包括存储单元晶体管，其包括设置在半导体衬底上的第一下绝缘膜，设置在第一下绝缘膜上的第一中间绝缘膜，设置在第一中间绝缘膜上的第一上绝缘膜和第一栅极 设置在第一上绝缘膜上的电极和设置在半导体衬底上的第二下绝缘膜的选择晶体管，设置在第二下绝缘膜上的第二中间绝缘膜，设置在第二中间绝缘膜上的第二上绝缘膜 以及设置在第二上绝缘膜上的第二栅电极，其中第二中间绝缘膜的阱密度低于第一中间绝缘膜的陷阱密度。

公开(公告)号：US20110053339A1

公开(公告)日：2011-03-03

申请号：US12850730

申请日：2010-08-05

申请人： Yoshio OZAWA

发明人： Yoshio OZAWA

IPC分类号： H01L21/28 ,  H01L21/762

CPC分类号： H01L27/11521 ,  H01L21/76224 ,  H01L29/513 ,  H01L29/7881

摘要： In one embodiment, a method for manufacturing a semiconductor device includes forming a first conductor layer on a surface of a semiconductor layer via a tunnel insulating film. The method includes forming an isolation trench extending from a surface of the first conductor layer to the semiconductor layer to form a plurality of conductive plates on the tunnel insulating film. The method includes filling the isolation trench with an element insulation insulating film from bottom of the isolation trench to an intermediate portion of a side surface of each of the conductive plates. The method includes forming a silicon nitride film on an exposed surface of the each of the conductive plates not covered with the element insulation insulating film. In addition, the method includes filling an upper portion of the isolation trench by forming a second conductor layer above the conductive plates and the element insulation insulating film.

摘要翻译： 在一个实施例中，一种用于制造半导体器件的方法包括经由隧道绝缘膜在半导体层的表面上形成第一导体层。 该方法包括形成从第一导体层的表面延伸到半导体层的隔离沟槽，以在隧道绝缘膜上形成多个导电板。 该方法包括将隔离沟槽填充到隔离沟槽的底部的元件绝缘绝缘膜到每个导电板的侧表面的中间部分。 该方法包括在未被元件绝缘绝缘膜覆盖的每个导电板的暴露表面上形成氮化硅膜。 此外，该方法包括通过在导电板和元件绝缘绝缘膜之上形成第二导体层来填充隔离沟槽的上部。

公开(公告)号：US20100221881A1

公开(公告)日：2010-09-02

申请号：US12717408

申请日：2010-03-04

申请人： Yoshio OZAWA

发明人： Yoshio OZAWA

IPC分类号： H01L21/336

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7881

摘要： According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an upper portion which is narrower in a channel width direction than a lower portion, an interelectrode insulating film formed on the floating gate electrodes, and a control gate electrode which is formed on the interelectrode insulating film formed on the floating gate electrodes and partially buried between the floating gate electrodes opposing each other.

摘要翻译： 根据本发明的一个方面，提供了一种包括多个存储单元的半导体器件，包括多个浮置栅电极，形成在形成在半导体衬底上的隧道绝缘膜上，并且具有较窄的上部 沟道宽度方向比下部，形成在浮栅上的电极间绝缘膜，以及控制栅电极，形成在形成在浮置栅电极上且部分地埋在浮置栅电极之间的电极间绝缘膜上， 。

公开(公告)号：US20100140684A1

公开(公告)日：2010-06-10

申请号：US12575906

申请日：2009-10-08

申请人： Yoshio OZAWA

发明人： Yoshio OZAWA

IPC分类号： H01L29/792 ,  H01L21/28 ,  H01L21/20

CPC分类号： H01L27/11582 ,  H01L21/02255 ,  H01L21/02667 ,  H01L21/28282 ,  H01L29/0657 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/792 ,  H01L29/7926

摘要： On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.

摘要翻译： 在硅衬底上通过交替堆叠多个氧化硅膜和硅膜形成层叠体，在层叠体中形成沟槽，依次形成氧化铝膜，氮化硅膜和氧化硅膜，依次形成 沟槽的内表面，沟道硅晶体膜形成在氧化硅膜上。 接下来，通过在氧气气氛中进行热处理，在氧化硅膜和沟道硅晶体膜之间的界面处形成氧化硅层。

公开(公告)号：US20090261400A1

公开(公告)日：2009-10-22

申请号：US12425077

申请日：2009-04-16

申请人： Yoshio OZAWA ,  Ryota FUJITSUKA

发明人： Yoshio OZAWA ,  Ryota FUJITSUKA

IPC分类号： H01L29/788 ,  H01L21/28 ,  H01L21/336

CPC分类号： H01L27/11568 ,  H01L29/513 ,  H01L29/78

摘要： A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a charge storage insulating film formed on the tunnel insulating film and including at least two separated low oxygen concentration portions and a high oxygen concentration portion positioned between the adjacent low oxygen concentration portions and having a higher oxygen concentration than the low oxygen concentration portions, a charge block insulating film formed on the charge storage insulating film, and control gate electrodes formed on the charge block insulating film and above the low oxygen concentration portions.

摘要翻译： 半导体器件包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，并且包括至少两个分离的低氧浓度部分和位于相邻低氧浓度部分之间的高氧浓度部分，以及 具有比低氧浓度部分更高的氧浓度，形成在电荷存储绝缘膜上的电荷块绝缘膜，以及形成在充电块绝缘膜上和低氧浓度部分上方的控制栅电极。

公开(公告)号：US20090250768A1

公开(公告)日：2009-10-08

申请号：US12408119

申请日：2009-03-20

申请人： Atsuhiro SATO ,  Fumitaka ARAI ,  Yoshio OZAWA ,  Takeshi KAMIGAICHI

发明人： Atsuhiro SATO ,  Fumitaka ARAI ,  Yoshio OZAWA ,  Takeshi KAMIGAICHI

IPC分类号： H01L27/088 ,  H01L21/28

CPC分类号： H01L21/823462 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/7881

摘要： A semiconductor memory device according to the present invention includes: a first transistor formed on a semiconductor substrate 11, the first transistor including a first gate-insulating film 14a that is oxynitrided; and a second transistor including a second gate-insulating film 14b formed on the semiconductor substrate 11 and a barrier film 20 formed at least partially on the second gate-insulating film 14b, the second gate-insulating film having a lower nitrogen atom concentration than the first gate-insulating film.

摘要翻译： 根据本发明的半导体存储器件包括：形成在半导体衬底11上的第一晶体管，所述第一晶体管包括被氮氧化的第一栅极绝缘膜14a; 以及第二晶体管，包括形成在半导体衬底11上的第二栅极绝缘膜14b和至少部分地形成在第二栅极绝缘膜14b上的阻挡膜20，第二栅极绝缘膜具有比 第一栅极绝缘膜。

公开(公告)号：US20080277716A1

公开(公告)日：2008-11-13

申请号：US12113367

申请日：2008-05-01

申请人： Daisuke NISHIDA ,  Akihito YAMAMOTO ,  Yoshio OZAWA ,  Katsuaki NATORI ,  Katsuyuki SEKINE ,  Masayuki TANAKA ,  Ryota FUJITSUKA

发明人： Daisuke NISHIDA ,  Akihito YAMAMOTO ,  Yoshio OZAWA ,  Katsuaki NATORI ,  Katsuyuki SEKINE ,  Masayuki TANAKA ,  Ryota FUJITSUKA

IPC分类号： H01L29/788

CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324

摘要： A semiconductor device includes a semiconductor substrate having a device formation region, a tunnel insulating film formed on the device formation region, a floating gate electrode formed on the tunnel insulating film, isolation insulating films which cover side surfaces of the device formation region, side surfaces of the tunnel insulating film, and side surfaces of a lower portion of the floating gate electrode, an inter-electrode insulating film which covers an upper surface and side surfaces of an upper portion of the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein upper corner portions of the floating gate electrode are rounded as viewed from a direction parallel with the upper surface and the side surfaces of the upper portion of the floating gate electrode.

摘要翻译： 半导体器件包括具有器件形成区域的半导体衬底，形成在器件形成区域上的隧道绝缘膜，形成在隧道绝缘膜上的浮置栅电极，覆盖器件形成区域的侧表面的隔离绝缘膜，侧表面 的隧道绝缘膜的侧表面和浮栅的下部的侧表面，覆盖浮置栅电极的上部的上表面和侧表面的电极间绝缘膜和形成在栅极电极上的控制栅电极 所述电极间绝缘膜，其中，从与所述浮栅电极的上部的上表面和所述侧面平行的方向观察，所述浮栅电极的上角部为圆形。

公开(公告)号：US20120034772A1

公开(公告)日：2012-02-09

申请号：US13274030

申请日：2011-10-14

申请人： Hirokazu ISHIDA ,  Masayuki TANAKA ,  Yoshio OZAWA

发明人： Hirokazu ISHIDA ,  Masayuki TANAKA ,  Yoshio OZAWA

IPC分类号： H01L21/28

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/513

摘要： A nonvolatile semiconductor memory device includes a first insulator, first conductor, element isolation insulator, second insulator and second conductor. The first insulator is formed on the main surface of a substrate and the first conductor is formed on the first insulator. The element isolation insulator is filled into at least part of both side surfaces of the first insulator in a gate width direction thereof and both side surfaces of the first conductor in a gate width direction thereof and is so formed that the upper surface thereof will be set with height between those of the upper and bottom surfaces of the first conductor. The second insulator includes a three-layered insulating film formed of a silicon oxide film, a silicon oxynitride film and a silicon oxide film formed on the first conductor and element isolation insulator. The second conductor is formed on the second insulator.

摘要翻译： 非易失性半导体存储器件包括第一绝缘体，第一导体，元件隔离绝缘体，第二绝缘体和第二导体。 第一绝缘体形成在基板的主表面上，第一导体形成在第一绝缘体上。 元件隔离绝缘体在其栅极宽度方向上填充到第一绝缘体的两个侧表面的至少一部分中，并且第一导体的栅极宽度方向的两个侧表面被形成为使得其上表面将被设置 其高度在第一导体的上表面和底表面之间。 第二绝缘体包括由形成在第一导体和元件隔离绝缘体上的氧化硅膜，氧氮化硅膜和氧化硅膜形成的三层绝缘膜。 第二导体形成在第二绝缘体上。