公开(公告)号：US20140021532A1

公开(公告)日：2014-01-23

申请号：US13553405

申请日：2012-07-19

申请人： Krishna Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66977 ,  B82Y10/00 ,  H01L29/0657 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0688 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/205 ,  H01L29/42372 ,  H01L29/66356 ,  H01L29/66439 ,  H01L29/66522 ,  H01L29/66666 ,  H01L29/7391 ,  H01L29/775 ,  H01L29/7827

摘要： Among other things, one or more techniques for forming a vertical tunnel field effect transistor (FET), and a resulting vertical tunnel FET are provided herein. In an embodiment, the vertical tunnel FET is formed by forming a core over a first type substrate region, forming a second type channel shell around a circumference greater than a core circumference, forming a gate dielectric around a circumference greater than the core circumference, forming a gate electrode around a circumference greater than the core circumference, and forming a second type region over a portion of the second type channel shell, where the second type has a doping opposite a doping of the first type. In this manner, line tunneling is enabled, thus providing enhanced tunneling efficiency for a vertical tunnel FET.

摘要翻译： 除此之外，本文提供了用于形成垂直隧道场效应晶体管（FET）的一种或多种技术以及所产生的垂直隧道FET。 在一个实施例中，垂直隧道FET通过在第一类型的衬底区域上形成芯体形成，围绕围绕圆周的圆周形成第二类型沟道壳体，围绕围绕圆周的圆周形成栅极电介质，形成 围绕圆周大于芯圆周的栅电极，并且在第二类型沟槽壳体的一部分上形成第二类型区域，其中第二类型具有与第一类型的掺杂相反的掺杂。 以这种方式，能够进行线路隧道，从而为垂直隧道FET提供增强的隧道效率。

公开(公告)号：US08916927B2

公开(公告)日：2014-12-23

申请号：US13553405

申请日：2012-07-19

申请人： Krishna Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/66 ,  H01L21/336

CPC分类号： H01L29/66977 ,  B82Y10/00 ,  H01L29/0657 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0688 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/205 ,  H01L29/42372 ,  H01L29/66356 ,  H01L29/66439 ,  H01L29/66522 ,  H01L29/66666 ,  H01L29/7391 ,  H01L29/775 ,  H01L29/7827

摘要： Among other things, one or more techniques for forming a vertical tunnel field effect transistor (FET), and a resulting vertical tunnel FET are provided herein. In an embodiment, the vertical tunnel FET is formed by forming a core over a first type substrate region, forming a second type channel shell around a circumference greater than a core circumference, forming a gate dielectric around a circumference greater than the core circumference, forming a gate electrode around a circumference greater than the core circumference, and forming a second type region over a portion of the second type channel shell, where the second type has a doping opposite a doping of the first type. In this manner, line tunneling is enabled, thus providing enhanced tunneling efficiency for a vertical tunnel FET.

摘要翻译： 除此之外，本文提供了用于形成垂直隧道场效应晶体管（FET）的一种或多种技术以及所产生的垂直隧道FET。 在一个实施例中，垂直隧道FET通过在第一类型的衬底区域上形成芯体形成，围绕围绕圆周的圆周形成第二类型沟道壳体，围绕围绕圆周的圆周形成栅极电介质，形成 围绕圆周大于芯圆周的栅电极，并且在第二类型沟槽壳体的一部分上形成第二类型区域，其中第二类型具有与第一类型的掺杂相反的掺杂。 以这种方式，能够进行线路隧道，从而为垂直隧道FET提供增强的隧道效率。

公开(公告)号：US09735239B2

公开(公告)日：2017-08-15

申请号：US13444695

申请日：2012-04-11

申请人： Gerben Doornbos ,  Krishna Kumar Bhuwalka ,  Matthias Passlack

发明人： Gerben Doornbos ,  Krishna Kumar Bhuwalka ,  Matthias Passlack

IPC分类号： H01L29/66 ,  H01L29/205 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/205 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/785

摘要： A system and method for a channel region is disclosed. An embodiment comprises a channel region with multiple bi-layers comprising alternating complementary materials such as layers of InAs and layers of GaSb. The alternating layers of complementary materials provide desirable band gap characteristics for the channel region as a whole that individual layers of material may not.

公开(公告)号：US20130270607A1

公开(公告)日：2013-10-17

申请号：US13444695

申请日：2012-04-11

申请人： Gerben Doornbos ,  Krishna Kumar Bhuwalka ,  Matthias Passlack

发明人： Gerben Doornbos ,  Krishna Kumar Bhuwalka ,  Matthias Passlack

IPC分类号： H01L29/205 ,  H01L21/336 ,  H01L29/78

CPC分类号： H01L29/205 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/785

摘要： A system and method for a channel region is disclosed. An embodiment comprises a channel region with multiple bi-layers comprising alternating complementary materials such as layers of InAs and layers of GaSb. The alternating layers of complementary materials provide desirable band gap characteristics for the channel region as a whole that individual layers of material may not.

摘要翻译： 公开了一种用于信道区域的系统和方法。 一个实施例包括具有多个双层的沟道区，包括交替的互补材料，例如InAs层和GaSb层。 互补材料的交替层为通道区域提供期望的带隙特性，整体上材料的各层可能不是。

公开(公告)号：US08604518B2

公开(公告)日：2013-12-10

申请号：US13307738

申请日：2011-11-30

申请人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/66

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/205 ,  H01L29/267 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/785

摘要： A Fin Field-Effect Transistor (FinFET) includes a fin, which includes a channel splitter having a first bandgap, and a channel including a first portion and a second portion on opposite sidewalls of the channel splitter. The channel has a second bandgap smaller than the first bandgap. A gate electrode includes a first portion and a second portion on opposite sides of the fin. A gate insulator includes a first portion between the first portion of the gate electrode and the first portion of the channel, and a second portion between the second portion of the gate electrode and the second portion of the channel.

摘要翻译： 鳍场效应晶体管（FinFET）包括鳍，其包括具有第一带隙的沟道分离器和包括在沟道分离器的相对侧壁上的第一部分和第二部分的沟道。 通道具有小于第一带隙的第二带隙。 栅极电极包括在鳍片的相对侧上的第一部分和第二部分。 栅极绝缘体包括位于栅极电极的第一部分和沟道的第一部分之间的第一部分，以及栅电极的第二部分和沟道的第二部分之间的第二部分。

公开(公告)号：US08471329B2

公开(公告)日：2013-06-25

申请号：US13298075

申请日：2011-11-16

申请人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/78

CPC分类号： H01L29/7391 ,  H01L29/785

摘要： A tunnel field-effect transistor (TFET) includes a gate electrode, a source region, and a drain region. The source and drain regions are of opposite conductivity types. A channel region is disposed between the source region and the drain region. A source diffusion barrier is disposed between the channel region and the source region. The source diffusion barrier and the source region are under and overlapping the gate electrode. The source diffusion barrier has a first bandgap greater than second bandgaps of the source region, the drain region, and the channel region.

摘要翻译： 隧道场效应晶体管（TFET）包括栅电极，源极区和漏极区。 源区和漏区具有相反的导电类型。 沟道区域设置在源极区域和漏极区域之间。 源极扩散阻挡层设置在沟道区域和源极区域之间。 源极扩散阻挡层和源极区域在栅极电极下方并且重叠。 源极扩散阻挡层具有大于源极区域，漏极区域和沟道区域的第二带隙的第一带隙。

公开(公告)号：US20130134481A1

公开(公告)日：2013-05-30

申请号：US13307738

申请日：2011-11-30

申请人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/205 ,  H01L29/267 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/785

摘要： A Fin Field-Effect Transistor (FinFET) includes a fin, which includes a channel splitter having a first bandgap, and a channel including a first portion and a second portion on opposite sidewalls of the channel splitter. The channel has a second bandgap smaller than the first bandgap. A gate electrode includes a first portion and a second portion on opposite sides of the fin. A gate insulator includes a first portion between the first portion of the gate electrode and the first portion of the channel, and a second portion between the second portion of the gate electrode and the second portion of the channel.

摘要翻译： 鳍场效应晶体管（FinFET）包括鳍，其包括具有第一带隙的沟道分离器和包括在沟道分离器的相对侧壁上的第一部分和第二部分的沟道。 通道具有小于第一带隙的第二带隙。 栅极电极包括在鳍片的相对侧上的第一部分和第二部分。 栅极绝缘体包括位于栅极电极的第一部分和沟道的第一部分之间的第一部分，以及栅电极的第二部分和沟道的第二部分之间的第二部分。

公开(公告)号：US20130119395A1

公开(公告)日：2013-05-16

申请号：US13298075

申请日：2011-11-16

申请人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

发明人： Krishna Kumar Bhuwalka ,  Gerben Doornbos ,  Matthias Passlack

IPC分类号： H01L29/78

CPC分类号： H01L29/7391 ,  H01L29/785

摘要： A tunnel field-effect transistor (TFET) includes a gate electrode, a source region, and a drain region. The source and drain regions are of opposite conductivity types. A channel region is disposed between the source region and the drain region. A source diffusion barrier is disposed between the channel region and the source region. The source diffusion barrier and the source region are under and overlapping the gate electrode. The source diffusion barrier has a first bandgap greater than second bandgaps of the source region, the drain region, and the channel region.

摘要翻译： 隧道场效应晶体管（TFET）包括栅电极，源极区和漏极区。 源区和漏区具有相反的导电类型。 沟道区域设置在源极区域和漏极区域之间。 源极扩散阻挡层设置在沟道区域和源极区域之间。 源极扩散阻挡层和源极区域在栅极电极下方并且重叠。 源极扩散阻挡层具有大于源极区域，漏极区域和沟道区域的第二带隙的第一带隙。

公开(公告)号：US20110193134A1

公开(公告)日：2011-08-11

申请号：US13009036

申请日：2011-01-19

申请人： Matthias Passlack

发明人： Matthias Passlack

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/1054 ,  H01L29/205 ,  H01L29/22 ,  H01L29/267

摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a buffer layer over a substrate, the buffer layer containing a first compound semiconductor that includes elements from one of: III-V families of a periodic table; and II-VI families of the periodic table. The method includes forming a channel layer over the buffer layer. The channel layer contains a second compound semiconductor that includes elements from the III-V families of the periodic table. The method includes forming a gate over the channel layer. The method includes depositing impurities on regions of the channel layer on either side of the gate. The method includes performing an annealing process to activate the impurities in the channel layer.

摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括在衬底上形成缓冲层，该缓冲层包含第一化合物半导体，该第一化合物半导体包括元素周期表III-V族之一元素; 和II-VI族。 该方法包括在缓冲层上形成沟道层。 沟道层包含第二化合物半导体，其包括来自周期表的III-V族的元素。 该方法包括在沟道层上形成栅极。 该方法包括在栅极的任一侧上的沟道层的区域上沉积杂质。 该方法包括执行退火处理以激活沟道层中的杂质。

公开(公告)号：US20110068348A1

公开(公告)日：2011-03-24

申请号：US12562790

申请日：2009-09-18

申请人： Matthias Passlack

发明人： Matthias Passlack

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66522 ,  H01L29/512 ,  H01L29/7833

摘要： A thin body MOSFET with conducting surface channel extensions and gate-controlled channel sidewalls is described. One embodiment is a MOSFET comprising a semiconductor substrate; a channel layer disposed on a top surface of the substrate; a gate dielectric layer interposed between a gate electrode and the channel layer; and dielectric extension layers disposed on top of the channel layer and interposed between the gate electrode and Ohmic contacts. The gate dielectric layer comprises a first material, the first material forming an interface of low defectivity with the channel layer. In contrast, the dielectric extensions comprise a second material different than the first material, the second material forming a conducting surface channel with the channel layer.

摘要翻译： 描述了具有导电表面通道扩展和栅极控制通道侧壁的薄体MOSFET。 一个实施例是包括半导体衬底的MOSFET; 设置在所述基板的上表面上的沟道层; 插入在栅电极和沟道层之间的栅介质层; 以及设置在沟道层顶部并介于栅电极和欧姆接触之间的电介质延伸层。 栅介质层包括第一材料，第一材料形成具有低缺陷率的界面与沟道层。 相反，电介质延伸部包括不同于第一材料的第二材料，第二材料与沟道层形成导电表面沟道。