公开(公告)号：US20060006857A1

公开(公告)日：2006-01-12

申请号：US11166765

申请日：2005-06-24

Applicant: Kuno Lenz ,  Claude Renous ,  Jean-Luc Patry

Inventor： Kuno Lenz ,  Claude Renous ,  Jean-Luc Patry

IPC: G05F1/44

CPC classification number: G05F1/565

Abstract: An integrated circuit including at least one low-dropout voltage regulator (LDO) capable of delivering a regulated output voltage using a reference voltage (VREF), comprises means for generating a substitution voltage (VRMP) in the form of a ramp and control means capable of replacing the reference voltage (VREF) by the substitution voltage as long as the said substitution voltage (VRMP) is lower than the said reference voltage (VREF).

Abstract translation: 包括能够使用参考电压（V SUB REF）传送稳定的输出电压的至少一个低压差稳压器（LDO）的集成电路包括用于产生取代电压（V SUB）的装置， 斜波形式的RMP）和能够通过置换电压代替参考电压（V SUB REF ）的控制装置，只要所述取代电压（V SUB RMP < / SUB>）低于所述参考电压（V REF REF）。

公开(公告)号：US07279977B2

公开(公告)日：2007-10-09

申请号：US11098005

申请日：2005-04-01

Applicant: Kuno Lenz

Inventor： Kuno Lenz

IPC: H03G3/12

CPC classification number: H03G1/0088 ,  H03H7/06

Abstract: An integrated circuit includes a resistive circuit with reduced mismatch that includes a primary resistive network with several main resistances (Rp) each having the same theoretical main value. It also includes an auxiliary resistance (Rau) having an auxiliary theoretical resistive value equal to the product or to the quotient of the theoretical main resistive value by √{square root over (2)}. All these resistances are connected together so as to attribute a theoretical overall resistive value to the primary resistive network equal to the theoretical auxiliary resistive value.

Abstract translation: 集成电路包括具有减小的失配的电阻电路，其包括具有几个主电阻（Rp）的主电阻网络，每个具有相同的理论主值。 它还包括辅助电阻（Rau），其具有等于产品的辅助理论电阻值或理论主电阻值的乘数乘以√{平方根超过（2.所有这些电阻连接在一起，以便归因于理论 与主电阻网络的总电阻值等于理论辅助电阻值。

公开(公告)号：US5905454A

公开(公告)日：1999-05-18

申请号：US993364

申请日：1997-12-18

Applicant: Kuno Lenz ,  Welk Reiner

Inventor： Kuno Lenz ,  Welk Reiner

IPC: H03M1/78 ,  H03M1/66

CPC classification number: H03M1/785

Abstract: The present invention relates to a digital-to-analog converter providing two complementary output signals varying inversely with respect to each other and by steps according to a digital datum to be converted, including circuitry for offsetting by one step the variation characteristic of one of the output signals.

Abstract translation: 本发明涉及一种数模转换器，其提供两个相互相反变化的互补输出信号，并且根据要转换的数字数据的步骤，包括用于将一个步骤中的一个的变化特性偏移的电路 输出信号。

公开(公告)号：US06552586B2

公开(公告)日：2003-04-22

申请号：US09965618

申请日：2001-09-26

Applicant: Jean-Charles Grasset ,  Philippe Cathelin ,  Kuno Lenz

Inventor： Jean-Charles Grasset ,  Philippe Cathelin ,  Kuno Lenz

IPC: H03B1900

CPC classification number: H03D7/14

Abstract: A mixer including a stage for inputting a voltage signal to be shifted and a shift and output stage for providing frequency-shifted signals, a biasing network of the output stage including, between a high supply and a biasing node, a constant current source in parallel with an output element of a current mirror, an input element of which receives a bias order from the input stage.

公开(公告)号：US20060158232A1

公开(公告)日：2006-07-20

申请号：US11296186

申请日：2005-12-07

Applicant: Kuno Lenz

Inventor： Kuno Lenz

IPC: H03B1/00

CPC classification number: G06F13/4072 ,  H03K19/0013 ,  H03K19/01707 ,  H03K19/01721

Abstract: A solution for increasing the switching speed of a bus driver circuit includes a pair of transistors controlled by a pair of control circuits. Pumping circuits are placed between the control electrodes of the transistors to speed up the conduction of one of the transistors immediately after the other is in an off state. An output interface for a differential bus is produced using two bus driver circuits, the control signals of one of the circuits being inverted relative to the other of the circuits.

Abstract translation: 用于增加总线驱动器电路的开关速度的解决方案包括由一对控制电路控制的一对晶体管。 泵浦电路被放置在晶体管的控制电极之间，以加速其中一个晶体管之间的导通，而另一个处于关断状态。 使用两个总线驱动器电路产生用于差分总线的输出接口，其中一个电路的控制信号相对于另一个电路反相。

公开(公告)号：US20060017508A1

公开(公告)日：2006-01-26

申请号：US11098005

申请日：2005-04-01

Applicant: Kuno Lenz

Inventor： Kuno Lenz

IPC: H03G3/12

CPC classification number: H03G1/0088 ,  H03H7/06

Abstract: An integrated circuit includes a resistive circuit with reduced mismatch that includes a primary resistive network with several main resistances (Rp) each having the same theoretical main value. It also includes an auxiliary resistance (Rau) having an auxiliary theoretical resistive value equal to the product or to the quotient of the theoretical main resistive value by √{square root over (2)}. All these resistances are connected together so as to attribute a theoretical overall resistive value to the primary resistive network equal to the theoretical auxiliary resistive value.

Abstract translation: 集成电路包括具有减小的失配的电阻电路，其包括具有几个主电阻（Rp）的主电阻网络，每个具有相同的理论主值。 它还包括辅助电阻（Rau），其具有等于产品的辅助理论电阻值或理论主电阻值的乘数乘以√{平方根超过（2.所有这些电阻连接在一起，以便归因于理论 与主电阻网络的总电阻值等于理论辅助电阻值。

公开(公告)号：US06741132B2

公开(公告)日：2004-05-25

申请号：US10319425

申请日：2002-12-12

Applicant: Claude Renous ,  Kuno Lenz

Inventor： Claude Renous ,  Kuno Lenz

IPC: H03F345

CPC classification number: H03F3/45475 ,  H03F1/086 ,  H03F2200/372 ,  H03F2203/45008 ,  H03F2203/45082

Abstract: A low noise differential amplifier structure comprising a first amplifier provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. A second amplifier is provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. The structure is characterized in that it comprises: at least a first trimming capacitor having a first electrode connected to the first electrode of the first Miller capacitor; at least a second trimming capacitor having a first electrode connected to the first electrode of the second Miller capacitor; and a cascode stage having an input receiving the output common mode voltage and an output connected to the second electrode of the first and second trimming capacitors.

Abstract translation: 一种低噪声差分放大器结构，包括具有输出级的第一放大器，分别具有与输出级的输入端和输出端连接的第一电极和第二电极的米勒电容器。 第二放大器设置有输出级，其具有分别连接到输出级的输入端和输出端的第一电极和第二电极的米勒电容器。 该结构的特征在于它包括：至少第一微调电容器，其具有连接到第一米勒电容器的第一电极的第一电极; 至少第二微调电容器，其具有连接到第二米勒电容器的第一电极的第一电极; 以及级联级，其具有接收输出共模电压的输入端和连接到第一和第二微调电容器的第二电极的输出端。

公开(公告)号：US07453249B2

公开(公告)日：2008-11-18

申请号：US11166765

申请日：2005-06-24

Applicant: Kuno Lenz ,  Claude Renous ,  Jean-Luc Patry

Inventor： Kuno Lenz ,  Claude Renous ,  Jean-Luc Patry

IPC: G05F1/40 ,  G05F1/56

CPC classification number: G05F1/565

Abstract: An integrated circuit including at least one low-dropout voltage regulator (LDO) capable of delivering a regulated output voltage using a reference voltage (VREF), comprises means for generating a substitution voltage (VRMP) in the form of a ramp and control means capable of replacing the reference voltage (VREF) by the substitution voltage as long as the substitution voltage (VRMP) is lower than the reference voltage (VREF).

Abstract translation: 包括能够使用参考电压（VREF）传递稳定的输出电压的至少一个低压降稳压器（LDO）的集成电路包括用于产生斜坡形式的替代电压（VRMP）和能够控制的控制装置的装置 只要取代电压（VRMP）低于参考电压（VREF），将替代电压替换为参考电压（VREF）。

公开(公告)号：US07391239B2

公开(公告)日：2008-06-24

申请号：US11296186

申请日：2005-12-07

Applicant: Kuno Lenz

Inventor： Kuno Lenz

IPC: H03K19/094 ,  H03K19/0175

CPC classification number: G06F13/4072 ,  H03K19/0013 ,  H03K19/01707 ,  H03K19/01721

Abstract: A solution for increasing the switching speed of a bus driver circuit includes a pair of transistors controlled by a pair of control circuits. Pumping circuits are placed between the control electrodes of the transistors to speed up the conduction of one of the transistors immediately after the other is in an off state. An output interface for a differential bus is produced using two bus driver circuits, the control signals of one of the circuits being inverted relative to the other of the circuits.

Abstract translation: 用于增加总线驱动器电路的开关速度的解决方案包括由一对控制电路控制的一对晶体管。 泵浦电路被放置在晶体管的控制电极之间，以加速其中一个晶体管之间的导通，而另一个处于断开状态。 使用两个总线驱动器电路产生用于差分总线的输出接口，其中一个电路的控制信号相对于另一个电路反相。

公开(公告)号：US5940144A

公开(公告)日：1999-08-17

申请号：US870616

申请日：1997-06-06

Applicant: Kuno Lenz ,  Sigrid Hauser

Inventor： Kuno Lenz ,  Sigrid Hauser

IPC: H04N5/57 ,  H04N9/68

CPC classification number: H04N5/57 ,  H04N9/68

Abstract: A device for regulating the luminance signal and chromanance signals of a video image to be converted into red, green and blue color signals. The device includes a conversion matrix and a device for regulating an amplitude of the luminance signal, the blue color difference chromanance signal and a red color difference chromanance signal to be modified by a user adjustment control. The device further includes a device for preventing the color signal having the highest value at the output of the conversion matrix from being able to exceed a saturation value substantially equal to a percentage, preferably 70%, of the white level of the image signal when the color signal reaches the saturation value.

Abstract translation: 一种用于调节要转换为红色，绿色和蓝色信号的视频图像的亮度信号和色度信号的装置。 该装置包括转换矩阵和用于调节亮度信号的幅度的装置，蓝色差异色度信号和用于通过用户调整控制修改的红色色差色度信号。 该装置还包括用于防止在转换矩阵的输出处具有最高值的彩色信号能够超过基本上等于图像信号的白电平的百分比，优选70％的饱和度的装置， 彩色信号达到饱和值。