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    Dual-system transmitting and receiving device
    3.
    发明申请
    Dual-system transmitting and receiving device 审中-公开
    双系统发射和接收设备

    公开(公告)号：US20080008271A1

    公开(公告)日：2008-01-10

    申请号：US11822842

    申请日：2007-07-10

    申请人： Kwang Du Lee ,  Yu Sin Kim ,  Sang Gyu Park ,  Chang Soo Yang

    发明人： Kwang Du Lee ,  Yu Sin Kim ,  Sang Gyu Park ,  Chang Soo Yang

    IPC分类号： H03D3/00 ,  H04L27/06 ,  H03D1/00 ,  H03K9/10

    CPC分类号： H04L27/001 ,  H04B1/0483 ,  H04B1/7163

    摘要： Provided is a dual-system transmitting device comprising a chaos signal generator that generates a chaos signal; a band-pass filter that filters the generated chaos signal into a signal within an information transmission bandwidth preset in a transmission side; an impulse signal generator that generates an impulse signal synchronized with a transmitted signal; a switching element that selectively outputs the chaos signal passing through the band-pass filter and the generated impulse signal; an amplifier that amplifies the signal selected by the switching element; and a signal transmitting unit that transmits the signal amplified by the amplifier through an antenna. When the signal amplified by the amplifier is a chaos signal, the signal transmitting unit modulates the amplified signal through an OOK (on-off keying) scheme such that the signal is transmitted as a carrier of a transmitted signal. When the signal amplified by the amplifier is an impulse signal, the signal transmitting unit passes the signal to transmit.Provided is a dual-system receiving device, which is applied to both a received signal using a chaos signal as a carrier and a received signal using an impulse signal as a carrier, the dual-system receiving device comprising a band-pass filter that filters a received signal into a signal within an information transmission bandwidth preset in a reception side; an amplifier that amplifies the filtered received signal; a first demodulator that, when the amplified received signal is a received signal using a chaos signal as a carrier, demodulates the amplified received signal; a second demodulator that, when the amplified received signal is a received signal using an impulse signal as a carrier, demodulates the amplified received signal; and a switching element that selectively outputs the received signal amplified by the amplifier to the first or second demodulator.

    摘要翻译： 提供了一种双系统发射装置，其包括产生混沌信号的混沌信号发生器; 带通滤波器，其将产生的混沌信号滤波成在发送侧预设的信息传输带宽内的信号; 产生与发送信号同步的脉冲信号的脉冲信号发生器; 选择性地输出通过带通滤波器的紊乱信号和产生的脉冲信号的开关元件; 放大器，放大由开关元件选择的信号; 以及信号发送单元，其通过天线发送由放大器放大的信号。 当由放大器放大的信号是混沌信号时，信号发送单元通过OOK（开关键控）方式来调制放大的信号，使得信号作为发送信号的载波被发送。 当由放大器放大的信号是脉冲信号时，信号发送单元通过信号进行发送。 提供了一种双系统接收装置，其被应用于使用混沌信号作为载波的接收信号和使用脉冲信号作为载波的接收信号，该双系统接收装置包括滤波器 将接收到的信号输入到在接收侧预设的信息传输带宽内的信号中; 放大器，滤波后的接收信号; 第一解调器，当放大的接收信号是使用混沌信号作为载波的接收信号时，解调放大的接收信号; 第二解调器，当放大的接收信号是使用脉冲信号作为载波的接收信号时，解调放大的接收信号; 以及选择性地将由放大器放大的接收信号输出到第一或第二解调器的开关元件。

    Current mode logic-CMOS converter
    5.
    发明授权
    Current mode logic-CMOS converter 有权
    电流模式逻辑CMOS转换器

    公开(公告)号：US07405600B2

    公开(公告)日：2008-07-29

    申请号：US11831348

    申请日：2007-07-31

    申请人： Yu Sin Kim ,  Jeong Ho Moon ,  Moo Il Jeong ,  Chang Seok Lee ,  Chang Soo Yang ,  Sang Gyu Park ,  Kwang Du Lee

    发明人： Yu Sin Kim ,  Jeong Ho Moon ,  Moo Il Jeong ,  Chang Seok Lee ,  Chang Soo Yang ,  Sang Gyu Park ,  Kwang Du Lee

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/018514

    摘要： A current mode logic (CML)-CMOS converter comprises an input stage that is turned on/off by receiving an input voltage from the outside; a voltage control unit that outputs a constant voltage; a first switching unit that is connected to the input stage and the voltage control unit and is turned on/off by the constant voltage applied from the voltage control unit; and a second switching unit that is connected to the input stage and is turned on/off by a signal applied from the input stage.

    摘要翻译： 电流模式逻辑（CML）-CMOS转换器包括通过从外部接收输入电压而被接通/断开的输入级; 输出恒定电压的电压控制单元; 第一开关单元，其连接到所述输入级和所述电压控制单元，并且通过从所述电压控制单元施加的恒定电压来接通/断开; 以及第二开关单元，其连接到所述输入级，并且通过从所述输入级施加的信号导通/截止。

    METHOD FOR COMPENSATING PERFORMANCE DEGRADATION OF RFIC USING EM SIMULATION
    6.
    发明申请
    METHOD FOR COMPENSATING PERFORMANCE DEGRADATION OF RFIC USING EM SIMULATION 有权
    使用EM模拟来补偿RFIC性能降低的方法

    公开(公告)号：US20080134112A1

    公开(公告)日：2008-06-05

    申请号：US11943211

    申请日：2007-11-20

    申请人： Yu Sin Kim ,  Chang Seok Lee ,  Chang Soo Yang ,  Kwang Du Lee ,  Hak Sun Kim

    发明人： Yu Sin Kim ,  Chang Seok Lee ,  Chang Soo Yang ,  Kwang Du Lee ,  Hak Sun Kim

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068 ,  G06F17/5036

    摘要： Provided is a method for compensating performance degradation of a radio frequency integrated circuit (RFIC) using an EM simulation. The method includes the steps of: (a) extracting the design specifications of the RFIC so as design and simulate a circuit; (b) designing the layout of the designed and simulated circuit, and extracting layout parameters by using the designed layout; (c) simplifying the layout and carrying out the EM simulation to extract performance parameters; (d) carrying out a circuit simulation by using the extracted layout parameters and performance parameters, and judging whether the results of the circuit simulation satisfy the design specifications of the RFIC or not; (e) when it is judged that the results of the circuit simulation satisfy the design specifications of the RFIC, performing a circuit manufacturing process; and (f) when it is not judged that the results of the circuit simulation satisfy the design specifications of the RFIC, partially removing the layout, and carrying out the EM simulation, thereby analyzing and compensating a performance degradation region.

    摘要翻译： 提供了一种使用EM模拟来补偿射频集成电路（RFIC）的性能劣化的方法。 该方法包括以下步骤：（a）提取RFIC的设计规范，以设计和模拟电路; （b）设计和仿真电路的布局设计，并通过设计布局提取布局参数; （c）简化布局并执行EM仿真以提取性能参数; （d）使用提取的布局参数和性能参数进行电路仿真，判断电路仿真结果是否符合RFIC的设计规范; （e）当判断电路仿真的结果满足RFIC的设计规范时，执行电路制造过程; 和（f）当不判断电路仿真的结果满足RFIC的设计规范时，部分地去除布局并进行EM仿真，从而分析和补偿性能退化区域。

    Method for compensating performance degradation of RFIC using EM simulation
    7.
    发明授权
    Method for compensating performance degradation of RFIC using EM simulation 有权
    使用EM模拟来补偿RFIC性能下降的方法

    公开(公告)号：US07954079B2

    公开(公告)日：2011-05-31

    申请号：US11943211

    申请日：2007-11-20

    申请人： Yu Sin Kim ,  Chang Seok Lee ,  Chang Soo Yang ,  Kwang Du Lee ,  Hak Sun Kim

    发明人： Yu Sin Kim ,  Chang Seok Lee ,  Chang Soo Yang ,  Kwang Du Lee ,  Hak Sun Kim

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068 ,  G06F17/5036

    摘要： Provided is a method for compensating performance degradation of a radio frequency integrated circuit (RFIC) using an EM simulation. The method includes the steps of: (a) extracting the design specifications of the RFIC so as design and simulate a circuit; (b) designing the layout of the designed and simulated circuit, and extracting layout parameters by using the designed layout; (c) simplifying the layout and carrying out the EM simulation to extract performance parameters; (d) carrying out a circuit simulation by using the extracted layout parameters and performance parameters, and judging whether the results of the circuit simulation satisfy the design specifications of the RFIC or not; (e) when it is judged that the results of the circuit simulation satisfy the design specifications of the RFIC, performing a circuit manufacturing process; and (f) when it is not judged that the results of the circuit simulation satisfy the design specifications of the RFIC, partially removing the layout, and carrying out the EM simulation, thereby analyzing and compensating a performance degradation region.

    摘要翻译： 提供了一种使用EM模拟来补偿射频集成电路（RFIC）的性能劣化的方法。 该方法包括以下步骤：（a）提取RFIC的设计规范，以设计和模拟电路; （b）设计和仿真电路的布局设计，并通过设计布局提取布局参数; （c）简化布局并执行EM仿真以提取性能参数; （d）使用提取的布局参数和性能参数进行电路仿真，判断电路仿真结果是否满足RFIC的设计规范; （e）当判断电路仿真的结果满足RFIC的设计规范时，执行电路制造过程; 和（f）当不判断电路仿真的结果满足RFIC的设计规范时，部分地去除布局并进行EM仿真，从而分析和补偿性能退化区域。

    Radio frequency switch circuit
    8.
    发明授权
    Radio frequency switch circuit 有权
    射频开关电路

    公开(公告)号：US08461919B2

    公开(公告)日：2013-06-11

    申请号：US13016349

    申请日：2011-01-28

    申请人： Yu Sin Kim ,  Youn Suk Kim ,  Dong Hyun Baek ,  Sun Woo Yoon

    发明人： Yu Sin Kim ,  Youn Suk Kim ,  Dong Hyun Baek ,  Sun Woo Yoon

    IPC分类号： H01L25/00

    CPC分类号： H03K17/94 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A radio frequency (RF) switch circuit in which an RF switch and a switch controller are formed on a single CMOS substrate and floating resistors are connected to a deep N type well substrate, an N type well substrate, and a P type well substrate to thereby increase linearity with respect to input power. In the RF switch having at least one NMOS (N type Metal Oxide Semiconductor) switch changing a transmission path of an RF signal, an N type terminal formed on a first deep N type well substrate receives driving power through a floating resistor, a P type terminal formed on a first P type substrate receives body power through a floating resistor, and the two N type terminals formed on the first P type substrate receive gate power through a floating resistor, and in the switch controller having at least one NMOS switch and at least one PMOS (P type Metal Oxide Semiconductor) switch controlling changing of a path of the RF switch, an N type terminal formed on a second deep N type well substrate and an N type terminal formed on the first N type substrate receive driving power through floating resistors.

    摘要翻译： 将RF开关和开关控制器形成在单个CMOS基板上的浮动开关电路和浮动电阻器连接到深N型阱基板，N型阱基板和P型阱基板， 从而相对于输入功率增加线性度。 在具有改变RF信号的传输路径的至少一个NMOS（N型金属氧化物半导体）开关的RF开关中，形成在第一深N型阱基板上的N型端子通过浮动电阻器接收驱动电力，P型 形成在第一P型基板上的端子通过浮动电阻器接收主体电力，并且形成在第一P型基板上的两个N型端子通过浮动电阻器接收栅极电力，并且在具有至少一个NMOS开关的开关控制器中 控制RF开关的路径变化的至少一个PMOS（P型金属氧化物半导体）开关，形成在第二深N型阱基板上的N型端子和形成在第一N型基板上的N型端子接收驱动电力 浮动电阻

    RESISTOR-SHARING SWITCHING CIRCUIT
    9.
    发明申请
    RESISTOR-SHARING SWITCHING CIRCUIT 有权
    电阻共享切换电路

    公开(公告)号：US20130015903A1

    公开(公告)日：2013-01-17

    申请号：US13532554

    申请日：2012-06-25

    申请人： Yu Sin Kim ,  Sung Hwan Park

    发明人： Yu Sin Kim ,  Sung Hwan Park

    IPC分类号： H03K17/56

    CPC分类号： H03K17/693 ,  H03K2217/0018

    摘要： Disclosed herein is a resistor-sharing switching circuit, including: a first switching element turning on/off between a first input and output terminal and a second input and output terminal; a second switching element turning on/off between the first input and output terminal and a third input and output terminal; a signal transmission unit connected to both a control terminal of the first switching element and a control terminal of the second switching element; and a resistor having one end connected to the signal transmission unit and the other end connected to a control signal input terminal.

    摘要翻译： 这里公开了一种电阻共享切换电路，包括：第一开关元件在第一输入和输出端子与第二输入和输出端子之间接通/断开; 第二开关元件在第一输入和输出端子与第三输入和输出端子之间接通/断开; 连接到第一开关元件的控制端子和第二开关元件的控制端子的信号传输单元; 以及电阻器，其一端连接到信号传输单元，另一端连接到控制信号输入端。

    INVERTER AND SWITCHING CIRCUIT
    10.
    发明申请
    INVERTER AND SWITCHING CIRCUIT 有权
    逆变器和开关电路

    公开(公告)号：US20120319737A1

    公开(公告)日：2012-12-20

    申请号：US13494914

    申请日：2012-06-12

    申请人： Yu Sin Kim ,  Sang Hee Kim ,  Dong Hyun Baek ,  Sun Woo Yun ,  Sung Hwan Park

    发明人： Yu Sin Kim ,  Sang Hee Kim ,  Dong Hyun Baek ,  Sun Woo Yun ,  Sung Hwan Park

    IPC分类号： H03K17/687 ,  H03K5/01

    CPC分类号： H03K19/0016 ,  H04B1/44

    摘要： Disclosed herein are an inverter and an antenna circuit. The inverter that receives control signals, inverts the control signals including a first control signal, a second control signal, and a third control signal, and outputs the inverted control signals, includes: a first MOS transistor having a gate to which a first control signal is applied and a source that is grounded; a second MOS transistor having a gate to which a third control signal is applied and a source to which a second control signal is applied; and a third MOS transistor having a gate to which a second control signal is applied and a source to which a third control signal is applied, wherein drains of the first MOS transistor, the second MOS transistor, and the third MOS transistor are connected to an output terminal.

    摘要翻译： 这里公开了逆变器和天线电路。 接收控制信号的逆变器，使包括第一控制信号，第二控制信号和第三控制信号的控制信号反相并输出反相控制信号，包括：第一MOS晶体管，具有栅极，第一控制信号 被施加和接地源; 具有施加了第三控制信号的栅极和施加第二控制信号的源极的第二MOS晶体管; 以及第三MOS晶体管，其具有施加第二控制信号的栅极和施加了第三控制信号的源极，其中所述第一MOS晶体管，所述第二MOS晶体管和所述第三MOS晶体管的漏极连接到 输出端子。