公开(公告)号：US20120007653A1

公开(公告)日：2012-01-12

申请号：US13180064

申请日：2011-07-11

申请人： Kyo-Jin CHOO ,  Yu-Jin PARK ,  Yong LIM

发明人： Kyo-Jin CHOO ,  Yu-Jin PARK ,  Yong LIM

IPC分类号： H03K17/00

CPC分类号： H03M9/00 ,  H03K5/15093

摘要： A data transmission device includes a control unit and a delay chain unit. The control unit outputs a first control signal through an nth control signal, where n is a natural number. The delay chain unit includes a first switching element through an nth switching element. The switching elements receive a first data signal through an nth data signal and perform pipelining operations on the first through nth data signals based upon the first through nth control signals, respectively, to output the pipelined data signals as at least one data stream. The switching elements are connected to each other to form at least one data delay chain.

摘要翻译： 数据传输装置包括控制单元和延迟链单元。 控制单元通过第n个控制信号输出第一控制信号，其中n是自然数。 延迟链单元包括通过第n个开关元件的第一开关元件。 开关元件通过第n个数据信号接收第一数据信号，并且分别基于第一至第N控制信号对第一至第n数据信号执行流水线操作，以将流水线数据信号作为至少一个数据流输出。 开关元件彼此连接以形成至少一个数据延迟链。

公开(公告)号：US20100238157A1

公开(公告)日：2010-09-23

申请号：US12569186

申请日：2009-09-29

申请人： Weon-Jun CHOE ,  Ah-Reum KIM ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG ,  Do-Hwan OH ,  Hee-Soo SONG

发明人： Weon-Jun CHOE ,  Ah-Reum KIM ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG ,  Do-Hwan OH ,  Hee-Soo SONG

IPC分类号： G09G5/00 ,  H04L27/06

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G2310/08 ,  G09G2370/08 ,  H03K7/04

摘要： A method of modulating and demodulating a signal includes modulating data information included in an input data signal provided from an external source and clock information included in an input clock signal provided from the external source into a transmission signal, using (n+1) delay clock signals generated based on the input clock signal, where n is a natural number. The transmission signal is demodulated into an output clock signal including restored clock information and an output data signal including restored data information, using (m+1) delay clock signals generated based on the clock information, where m is a natural number less than n.

摘要翻译： 调制和解调信号的方法包括：使用（n + 1）个延迟时钟将从外部源提供的输入数据信号中包括的数据信息和从外部源提供的输入时钟信号中包括的时钟信息调制成发送信号 基于输入时钟信号生成的信号，其中n是自然数。 使用基于时钟信息生成的（m + 1）个延迟时钟信号，将发送信号解调为包括恢复的时钟信息的输出时钟信号和包括恢复的数据信息的输出数据信号，其中m是小于n的自然数。

公开(公告)号：US20100156550A1

公开(公告)日：2010-06-24

申请号：US12630885

申请日：2009-12-04

申请人： Do-hwan OH ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG

发明人： Do-hwan OH ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG

IPC分类号： H03L7/02 ,  H01G4/40

CPC分类号： H03L7/099 ,  H03J2200/10 ,  H03L7/18 ,  H03L2207/06 ,  H03L2207/50

摘要： An adjustable capacitor is provided including a capacitor unit including a plurality of capacitor groups aligned in a matrix format and a switch unit to adjust capacitance by connecting the plurality of capacitor groups in parallel according to a selection signal of a column and row of the matrix. Accordingly, the adjustable capacitor may be realized of a small size but with a high capacitance change rate.

摘要翻译： 提供了一种可调节电容器，包括：电容器单元，其包括以矩阵形式排列的多个电容器组;以及开关单元，用于根据矩阵的列和行的选择信号并联连接多个电容器组来调整电容。 因此，可调电容器可以实现为小尺寸但具有高电容变化率。

公开(公告)号：US20100134165A1

公开(公告)日：2010-06-03

申请号：US12627229

申请日：2009-11-30

申请人： Do-hwan OH ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG

发明人： Do-hwan OH ,  Kyo-Jin CHOO ,  Deog-Kyoon JEONG

IPC分类号： H03L7/06 ,  H03K5/13

CPC分类号： G04F10/005 ,  G04F10/06 ,  H03L7/087 ,  H03L7/091

摘要： A time-to-digital converter (TDC) includes a converter which receives a first signal and a second signal, delays the second signal in phases using a plurality of delay elements which are coupled in series, compares the delayed second signal with the first signal, and outputs a phase error of the second signal with respect to the first signal, a phase frequency detector which receives the first signal, and a third signal from one of the nodes in the plurality of delay elements, and outputs a phase difference between the first signal and the third signal, and a frequency detector which outputs a frequency error of the second signal with respect to the first signal as a digital code using an output signal of the phase frequency detector and the second signal.

摘要翻译： 时间数字转换器（TDC）包括接收第一信号和第二信号的转换器，使用串联耦合的多个延迟元件来相位延迟第二信号，将延迟的第二信号与第一信号进行比较 并且输出相对于第一信号的第二信号的相位误差，接收第一信号的相位频率检测器和来自多个延迟元件中的一个节点的第三信号，并且输出第二信号之间的相位差 第一信号和第三信号，以及频率检测器，其使用相位频率检测器和第二信号的输出信号将相对于第一信号的第二信号的频率误差作为数字码输出。