公开(公告)号：US07470593B2

公开(公告)日：2008-12-30

申请号：US11150026

申请日：2005-06-10

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Young Lee

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Young Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/66575 ,  H01L27/10873 ,  H01L29/66492

摘要： Disclosed is a method for manufacturing a cell transistor of a semiconductor memory device. The method comprises the steps of: forming device isolation films and a well on a semiconductor substrate; forming a threshold voltage adjust region by ion-implanting a first conductive impurity dopant into the well of the semiconductor substrate; performing a first thermal annealing on the semiconductor substrate where the threshold voltage adjust region is formed; forming a gate insulating film and gate electrodes on top of the semiconductor substrate between the device isolation films; forming a halo ion implantation region by ion-implanting a first conductive impurity dopant into the semiconductor substrate corresponding to a drain region exposed by the gate electrodes; performing a second thermal annealing on the semiconductor substrate where the halo ion implantation region is formed; and forming source/drain regions by ion-implanting a second conductive impurity dopant into the semiconductor substrate exposed by the gate electrodes. This method can reduce the turn-off leakage current of the cell transistor since the dopant dose of the threshold voltage adjust region can be reduced while maintaining the threshold voltage by increasing the dopant diffusion of the threshold voltage adjust region.

摘要翻译： 公开了半导体存储器件的单元晶体管的制造方法。 该方法包括以下步骤：在半导体衬底上形成器件隔离膜和阱; 通过将第一导电杂质掺杂剂离子注入到所述半导体衬底的阱中来形成阈值电压调整区域; 在形成有阈值电压调整区域的半导体衬底上进行第一热退火; 在半导体衬底的顶部在器件隔离膜之间形成栅极绝缘膜和栅电极; 通过将第一导电杂质掺杂剂离子注入对应于由栅电极暴露的漏区的半导体衬底中形成晕圈离子注入区; 在形成有所述卤素离子注入区域的所述半导体衬底上进行第二热退火; 以及通过将第二导电杂质掺杂剂离子注入到由所述栅电极暴露的所述半导体衬底中来形成源/漏区。 该方法可以减小单元晶体管的截止漏电流，因为阈值电压调整区域的掺杂剂剂量可以通过增加阈值电压调整区域的掺杂剂扩散来维持阈值电压而降低。

公开(公告)号：US07790551B2

公开(公告)日：2010-09-07

申请号：US12603906

申请日：2009-10-22

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

IPC分类号： H01L21/336

CPC分类号： H01L29/4236 ,  H01L21/26586 ,  H01L21/28061 ,  H01L29/1041 ,  H01L29/516 ,  H01L29/66621

摘要： A transistor having a recess gate structure and a method for fabricating the same. The transistor includes a gate insulating layer formed on the inner walls of first trenches formed in a semiconductor substrate; a gate conductive layer formed on the gate insulating layer for partially filling the first trenches; gate electrodes formed on the gate conductive layer for completely filling the first trenches, and surrounded by the gate conductive layer; channel regions formed in the semiconductor substrate along the first trenches; and source/drain regions formed in a shallow portion of the semiconductor substrate.

摘要翻译： 具有凹陷栅极结构的晶体管及其制造方法。 晶体管包括形成在形成在半导体衬底中的第一沟槽的内壁上的栅极绝缘层; 形成在所述栅极绝缘层上以部分地填充所述第一沟槽的栅极导电层; 栅极电极，形成在栅极导电层上，用于完全填充第一沟槽，并被栅极导电层包围; 形成在半导体衬底中的第一沟槽区; 以及形成在半导体衬底的浅部中的源极/漏极区域。

公开(公告)号：US07687350B2

公开(公告)日：2010-03-30

申请号：US11450816

申请日：2006-06-09

申请人： Min Yong Lee ,  Kyoung Bong Rouh ,  Seung Woo Jin

发明人： Min Yong Lee ,  Kyoung Bong Rouh ,  Seung Woo Jin

IPC分类号： H01L21/336

CPC分类号： H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L29/1037 ,  H01L29/66621 ,  H01L29/66659

摘要： A method for manufacturing a semiconductor memory device using asymmetric junction ion implantation, including performing ion implantation for adjusting a threshold voltage to a semiconductor substrate, forming a gate stack on the semiconductor substrate to define a storage node junction region and a bit line junction region, implanting a first conductive impurity ion and a second conductive impurity ion using a mask layer pattern covering the storage node junction region while exposing the bit line junction region, forming a gate spacer layer at both sides of the gate stack, and implanting the first conductive impurity ion using the gate stack and the gate spacer layer as an ion implantation mask layer to form a storage node junction region and a bit line junction region having different impurity concentrations, and different junction depths from each other.

摘要翻译： 一种制造使用非对称结离子注入的半导体存储器件的方法，包括执行用于调整对半导体衬底的阈值电压的离子注入，在半导体衬底上形成栅叠层以限定存储节点结区域和位线结区域， 使用覆盖存储节点结区域的掩模层图案注入第一导电杂质离子和第二导电杂质离子，同时暴露位线结区域，在栅极堆叠的两侧形成栅极间隔层，以及注入第一导电杂质 使用栅极堆叠和栅极间隔层作为离子注入掩模层，以形成具有不同杂质浓度和不同结深度的存储节点结区域和位线结区域。

公开(公告)号：US20080128640A1

公开(公告)日：2008-06-05

申请号：US11445643

申请日：2006-06-01

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

IPC分类号： H01J37/08

CPC分类号： H01J37/3172 ,  H01J37/045 ,  H01J2237/30472 ,  H01J2237/31703 ,  H01J2237/31708

摘要： An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.

摘要翻译： 离子注入装置包括用于产生初始离子束的离子束源，捆扎离子束发生器，其适于基于预定频率将初始离子束改变成束状离子束，以在经过第一次时通过束状离子束 初始离子束第二次，用于加速已经通过离子束发生器的离子束的束线，以及用于在其中布置晶片以使由束线加速的离子束被植入晶片的终端站 ，所述终端站操作以沿垂直于离子束注入方向的方向移动所述晶片，以将所述束状离子束注入所述晶片的第一区域中，并将所述初始离子束注入所述晶片的第二区域。

公开(公告)号：US20050059226A1

公开(公告)日：2005-03-17

申请号：US10880017

申请日：2004-06-29

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Bong Soo Kim

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Bong Soo Kim

IPC分类号： H01L21/265 ,  H01L21/425 ,  H01L21/44

CPC分类号： H01L21/26506 ,  H01L21/26513

摘要： Disclosed is an ion implantation method capable of preventing a channeling phenomenon caused by a lattice structure of a semiconductor substrate. The ion implantation method includes the steps of forming a predetermined mask pattern on the semiconductor substrate, performing an ion implantation process with respect to the semiconductor substrate exposed by the predetermined mask without forming a tilt angle, thereby forming an impurity area in the semiconductor substrate, and applying vibration to a lattice structure of the semiconductor substrate when the ion implantation process is carried out with respect to the semiconductor substrate.

摘要翻译： 公开了一种能够防止由半导体衬底的晶格结构引起的沟道现象的离子注入方法。 离子注入方法包括以下步骤：在半导体衬底上形成预定的掩模图案，对由预定掩模暴露的半导体衬底进行离子注入处理而不形成倾斜角，从而在半导体衬底中形成杂质区域， 并且当相对于半导体衬底执行离子注入工艺时，对半导体衬底的晶格结构施加振动。

公开(公告)号：US08343859B2

公开(公告)日：2013-01-01

申请号：US12044722

申请日：2008-03-07

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee

IPC分类号： H01L21/425

CPC分类号： H01J37/3171 ,  H01L21/265

摘要： A non-uniform ion implantation apparatus comprises a wide ion beam generator configured to generate a plurality of wide ion beams to irradiate at least two regions on the entire area of a wafer, and a wafer rotating device configured to rotate the wafer in a predetermined direction while the wide ion beams generated by the wide ion beam generator are irradiated to the wafer. Among the wide ion beams, at least one wide ion beam has a different dose from that of at least one different wide ion beam. Since the wide ion beams are irradiated at different doses to the wafer, a smooth circular border is formed between the regions to which the impurity ions are implanted to different concentrations. Since the position of the wafer is suitably changed for the wide ion beams, it is possible to control disposition of the regions implanted with the impurity ions of different concentrations.

摘要翻译： 不均匀离子注入装置包括宽离子束发生器，其被配置为产生多个宽离子束以照射晶片的整个区域上的至少两个区域，以及晶片旋转装置，其被配置为沿预定方向旋转晶片 而由宽离子束发生器产生的宽离子束照射到晶片。 在宽离子束中，至少一个宽离子束与至少一个不同的宽离子束的剂量不同。 由于宽离子束以不同的剂量照射到晶片，所以在杂质离子被注入到不同浓度的区域之间形成平滑的圆形边界。 由于对于宽离子束适当地改变晶片的位置，因此可以控制注入不同浓度的杂质离子的区域的配置。

公开(公告)号：US07678653B2

公开(公告)日：2010-03-16

申请号：US12371798

申请日：2009-02-16

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

IPC分类号： H01L21/336

CPC分类号： H01L29/1037 ,  H01L29/42376 ,  H01L29/66621 ,  H01L29/78

摘要： A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.

摘要翻译： 具有凹槽的半导体器件及其制造方法。 半导体器件包括在其中形成有反三角形凹槽的半导体衬底; 在半导体衬底上形成具有指定厚度的栅极绝缘膜; 栅电极形成在栅极绝缘膜上，使得栅电极填充反三角形凹部并从半导体衬底的表面突出; 以及形成在半导体衬底中并且彼此相对的第一和第二接合区域，使得相应的一个栅电极插入其间。

公开(公告)号：US07186631B2

公开(公告)日：2007-03-06

申请号：US11201843

申请日：2005-08-11

申请人： Seung Woo Jin ,  Min Yong Lee ,  Kyoung Bong Rouh

发明人： Seung Woo Jin ,  Min Yong Lee ,  Kyoung Bong Rouh

IPC分类号： H01L21/26

CPC分类号： H01L21/28035 ,  H01L21/26513 ,  H01L21/823842 ,  Y10S438/918

摘要： Provided is a method for manufacturing a semiconductor device comprising forming a device isolation layer on a semiconductor substrate; forming gate insulating layers on the upper part of the semiconductor substrate having the device isolation layers formed thereon; forming an undoped layer for a gate electrode; implanting mixed dopant ions consisting of at least two dopant ions containing 11B ions into the undoped layer, utilizing an ion-implantation mask; and heat-treating the mixed dopant ion-implanted layer.

摘要翻译： 提供一种半导体器件的制造方法，包括在半导体衬底上形成器件隔离层; 在其上形成有器件隔离层的半导体衬底的上部形成栅极绝缘层; 形成用于栅电极的未掺杂层; 使用离子注入掩模将包含至少两种含有11+ B离子的掺杂剂离子组成的混合掺杂剂离子注入到未掺杂的层中; 并对混合掺杂剂离子注入层进行热处理。

公开(公告)号：US07700442B2

公开(公告)日：2010-04-20

申请号：US11962099

申请日：2007-12-21

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/7834 ,  H01L29/66621 ,  H01L29/66636

摘要： A semiconductor device, having a recessed gate and asymmetric dopant regions, comprises a semiconductor substrate having a trench with a first sidewall and a second sidewall, the heights of which are different from each other, a gate insulating layer pattern disposed on the semiconductor substrate, a gate stack disposed on the semiconductor such that the gate stack protrudes from the surface of the semiconductor substrate while the gate stack fills the trench, and first and second dopant regions disposed at the upper part of the semiconductor substrate adjacent to the first and second sidewalls of the trench, respectively, such that the first and second dopant regions have different steps.

摘要翻译： 具有凹入栅极和不对称掺杂区域的半导体器件包括具有第一侧壁和第二侧壁的沟槽的半导体衬底，其高度彼此不同，设置在半导体衬底上的栅极绝缘层图案， 设置在所述半导体上的栅极堆叠，使得所述栅极堆叠在所述栅极堆叠填充所述沟槽的同时从所述半导体衬底的表面突出;以及设置在所述半导体衬底的与所述第一和第二侧壁相邻的所述上部的第一和第二掺杂剂区域 分别使得第一和第二掺杂剂区域具有不同的步骤。

公开(公告)号：US07554106B2

公开(公告)日：2009-06-30

申请号：US11445643

申请日：2006-06-01

申请人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

发明人： Kyoung Bong Rouh ,  Seung Woo Jin ,  Min Yong Lee ,  Yong Soo Jung

IPC分类号： G21K5/10 ,  H01J37/08

CPC分类号： H01J37/3172 ,  H01J37/045 ,  H01J2237/30472 ,  H01J2237/31703 ,  H01J2237/31708

摘要： An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.

摘要翻译： 离子注入装置包括用于产生初始离子束的离子束源，捆扎离子束发生器，其适于基于预定频率将初始离子束改变成束状离子束，以在经过第一次时通过束状离子束 初始离子束第二次，用于加速已经通过离子束发生器的离子束的束线，以及用于在其中布置晶片以使由束线加速的离子束被植入晶片的终端站 ，所述终端站操作以沿垂直于离子束注入方向的方向移动所述晶片，以将所述束状离子束注入所述晶片的第一区域中，并将所述初始离子束注入所述晶片的第二区域。