摘要:
Disclosed is a method for manufacturing a cell transistor of a semiconductor memory device. The method comprises the steps of: forming device isolation films and a well on a semiconductor substrate; forming a threshold voltage adjust region by ion-implanting a first conductive impurity dopant into the well of the semiconductor substrate; performing a first thermal annealing on the semiconductor substrate where the threshold voltage adjust region is formed; forming a gate insulating film and gate electrodes on top of the semiconductor substrate between the device isolation films; forming a halo ion implantation region by ion-implanting a first conductive impurity dopant into the semiconductor substrate corresponding to a drain region exposed by the gate electrodes; performing a second thermal annealing on the semiconductor substrate where the halo ion implantation region is formed; and forming source/drain regions by ion-implanting a second conductive impurity dopant into the semiconductor substrate exposed by the gate electrodes. This method can reduce the turn-off leakage current of the cell transistor since the dopant dose of the threshold voltage adjust region can be reduced while maintaining the threshold voltage by increasing the dopant diffusion of the threshold voltage adjust region.
摘要:
A transistor having a recess gate structure and a method for fabricating the same. The transistor includes a gate insulating layer formed on the inner walls of first trenches formed in a semiconductor substrate; a gate conductive layer formed on the gate insulating layer for partially filling the first trenches; gate electrodes formed on the gate conductive layer for completely filling the first trenches, and surrounded by the gate conductive layer; channel regions formed in the semiconductor substrate along the first trenches; and source/drain regions formed in a shallow portion of the semiconductor substrate.
摘要:
A method for manufacturing a semiconductor memory device using asymmetric junction ion implantation, including performing ion implantation for adjusting a threshold voltage to a semiconductor substrate, forming a gate stack on the semiconductor substrate to define a storage node junction region and a bit line junction region, implanting a first conductive impurity ion and a second conductive impurity ion using a mask layer pattern covering the storage node junction region while exposing the bit line junction region, forming a gate spacer layer at both sides of the gate stack, and implanting the first conductive impurity ion using the gate stack and the gate spacer layer as an ion implantation mask layer to form a storage node junction region and a bit line junction region having different impurity concentrations, and different junction depths from each other.
摘要:
An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.
摘要:
Disclosed is an ion implantation method capable of preventing a channeling phenomenon caused by a lattice structure of a semiconductor substrate. The ion implantation method includes the steps of forming a predetermined mask pattern on the semiconductor substrate, performing an ion implantation process with respect to the semiconductor substrate exposed by the predetermined mask without forming a tilt angle, thereby forming an impurity area in the semiconductor substrate, and applying vibration to a lattice structure of the semiconductor substrate when the ion implantation process is carried out with respect to the semiconductor substrate.
摘要:
A non-uniform ion implantation apparatus comprises a wide ion beam generator configured to generate a plurality of wide ion beams to irradiate at least two regions on the entire area of a wafer, and a wafer rotating device configured to rotate the wafer in a predetermined direction while the wide ion beams generated by the wide ion beam generator are irradiated to the wafer. Among the wide ion beams, at least one wide ion beam has a different dose from that of at least one different wide ion beam. Since the wide ion beams are irradiated at different doses to the wafer, a smooth circular border is formed between the regions to which the impurity ions are implanted to different concentrations. Since the position of the wafer is suitably changed for the wide ion beams, it is possible to control disposition of the regions implanted with the impurity ions of different concentrations.
摘要:
A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.
摘要:
Provided is a method for manufacturing a semiconductor device comprising forming a device isolation layer on a semiconductor substrate; forming gate insulating layers on the upper part of the semiconductor substrate having the device isolation layers formed thereon; forming an undoped layer for a gate electrode; implanting mixed dopant ions consisting of at least two dopant ions containing 11B ions into the undoped layer, utilizing an ion-implantation mask; and heat-treating the mixed dopant ion-implanted layer.
摘要:
A semiconductor device, having a recessed gate and asymmetric dopant regions, comprises a semiconductor substrate having a trench with a first sidewall and a second sidewall, the heights of which are different from each other, a gate insulating layer pattern disposed on the semiconductor substrate, a gate stack disposed on the semiconductor such that the gate stack protrudes from the surface of the semiconductor substrate while the gate stack fills the trench, and first and second dopant regions disposed at the upper part of the semiconductor substrate adjacent to the first and second sidewalls of the trench, respectively, such that the first and second dopant regions have different steps.
摘要:
An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.