NON-VOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    1.
    发明申请
    NON-VOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号:US20130105877A1

    公开(公告)日:2013-05-02

    申请号:US13614028

    申请日:2012-09-13

    IPC分类号: H01L27/105 H01L21/8239

    摘要: A non-volatile memory device includes a substrate including an active region and a field region, selection transistors and cell transistors on the active region, bit line contacts on the bridge portions, and shared bit lines electrically connected to the bit line contacts. The active region includes string portions and bridge portions. The string portions extends in a first direction and is arranged in a second direction substantially perpendicular to the first direction, and the bridge portions connects at least two adjacent string portions. Each bridge portion has a length in the first direction equal to or longer than about twice a width of each bit line contact in the first direction.

    摘要翻译: 非易失性存储器件包括:衬底,其包括有源区域和场区域,有源区域上的选择晶体管和单元晶体管,桥接部分上的位线接触,以及电连接到位线触点的共享位线。 有源区域包括串部分和桥接部分。 弦线部分沿第一方向延伸并且布置在基本上垂直于第一方向的第二方向上,并且桥接部分连接至少两个相邻的线部分。 每个桥接部分具有在第一方向上的长度等于或大于每个位线接触件在第一方向上的宽度的大约两倍。

    VERTICAL MEMORY DEVICES
    2.
    发明申请

    公开(公告)号:US20180012903A1

    公开(公告)日:2018-01-11

    申请号:US15601501

    申请日:2017-05-22

    IPC分类号: H01L23/528

    摘要: A vertical memory device includes a substrate including a cell region and a peripheral circuit region, gate electrodes sequentially stacked on the cell region of the substrate in a vertical direction substantially perpendicular to an upper surface of the substrate, a channel on the cell region and extending through the gate electrodes in the vertical direction, a first lower contact plug on the peripheral circuit region and extending in the vertical direction, a second lower contact plug on the peripheral circuit region adjacent to the first lower contact plug and extending in the vertical direction, and a first upper wiring electrically connected to the first lower contact plug. The first upper wiring is configured to and apply an electrical signal to the first lower contact plug. The second lower contact plug is not electrically connected to an upper wiring configured to apply an electrical signal.

    FLASH MEMORY DEVICE ADAPTED TO PREVENT READ FAILURES DUE TO DUMMY STRINGS
    4.
    发明申请
    FLASH MEMORY DEVICE ADAPTED TO PREVENT READ FAILURES DUE TO DUMMY STRINGS 有权
    闪存存储器件适用于预防由于DUMMY STRINGS而导致的读取故障

    公开(公告)号:US20090262580A1

    公开(公告)日:2009-10-22

    申请号:US12495971

    申请日:2009-07-01

    IPC分类号: G11C16/04

    CPC分类号: G11C16/3418

    摘要: In a NAND flash memory device, a dummy NAND string is arranged between a plurality of normal NAND strings. A dummy bit line connected to the dummy NAND string is formed and/or controlled such that when program voltages are applied to the normal NAND strings, memory cells within the dummy NAND string are not programmed.

    摘要翻译: 在NAND闪存器件中,虚拟NAND串被布置在多个正常NAND串之间。 形成和/或控制连接到虚拟NAND串的虚拟位线,使得当将程序电压施加到常规NAND串时,虚拟NAND串内的存储器单元不被编程。