公开(公告)号：US20140223136A1

公开(公告)日：2014-08-07

申请号：US13761892

申请日：2013-02-07

Applicant: LSI CORPORATION

Inventor： Zhiwei Wu ,  Zhi Bin Li ,  Xiangdong Guo ,  Rui Shen ,  Razmik Karabed ,  Wu Chang

IPC: G06F12/10

CPC classification number: G06F12/1009

Abstract: The disclosure is directed to a system and method for accessing one or more values of a lookup table. In some embodiments, one or more read only memory devices are configured for storing a first plurality of values of the lookup table, and one or more combinational logic circuits are configured for accessing a second plurality of values of the lookup table. At least one of hardware area and timing pressures are mitigated through various storage and access schemes.

Abstract translation: 本公开针对用于访问查找表的一个或多个值的系统和方法。 在一些实施例中，一个或多个只读存储器设备被配置为存储查找表的第一多个值，并且一个或多个组合逻辑电路被配置用于访问查找表的第二多个值。 通过各种存储和访问方案来减轻硬件面积和时序压力中的至少一个。

公开(公告)号：US20140143289A1

公开(公告)日：2014-05-22

申请号：US13873224

申请日：2013-04-30

Applicant: LSI CORPORATION

Inventor： Razmik Karabed ,  Shaohua Yang ,  Wu Chang ,  Victor Krachkovsky ,  Zhiwei Wu

IPC: H03M7/30

CPC classification number: H03M7/30

Abstract: Various embodiments of the present invention provide apparatuses and methods for encoding and decoding data for constrained systems with reduced or eliminated need for hardware and time intensive arithmetic operations such as multiplication and division.

Abstract translation: 本发明的各种实施例提供了用于对受限制系统的数据进行编码和解码的装置和方法，其中减少或消除了对硬件和诸如乘法和除法之类的时间密集算术运算的需求。

公开(公告)号：US09542321B2

公开(公告)日：2017-01-10

申请号：US14260463

申请日：2014-04-24

Applicant: LSI Corporation

Inventor： Zhiwei Wu ,  Zhibin Li ,  Kurt J. Worrell ,  Joseph R. Robert ,  Feina Wen

IPC: G06F9/38 ,  G06F12/02 ,  G06F12/08 ,  G06F3/06 ,  G11B20/10

CPC classification number: G06F12/084 ,  G06F3/0608 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/0689 ,  G06F12/0802 ,  G06F12/0871 ,  G06F2003/0691 ,  G06F2003/0692 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/165 ,  G06F2212/21 ,  G06F2212/222 ,  G06F2212/224 ,  G06F2212/251 ,  G06F2212/262 ,  G06F2212/281 ,  G06F2212/282 ,  G06F2212/312 ,  G06F2212/462 ,  G06F2212/6042 ,  G06F2212/70 ,  G06F2212/7203 ,  G11B20/10527

Abstract: The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible memory slots. The random access buffer is configured to store slices of incoming data sectors in free memory slots, where a free memory slot is identified by a status flag associated with a logical address of the free memory slot. Meanwhile, a label buffer is configured to store labels associated with the slices of the incoming data sectors in a sequence based upon an interleaving scheme. Media sectors including the interleaved data slices are read out from the memory slots of the random access buffer in order of the sequence of labels stored by the label buffer. As the media sectors are read out of the random access buffer, the corresponding memory slots are freed up for incoming slices of the next super-sector.

Abstract translation: 本公开涉及一种用于使用包括多个独立可访问的存储器时隙的随机存取缓冲器对数据进行交织的系统和方法。 随机访问缓冲器被配置为在空闲存储器时隙中存储输入数据扇区的片段，其中通过与空闲存储器时隙的逻辑地址相关联的状态标志来识别空闲存储器时隙。 同时，标签缓冲器被配置为基于交织方案在序列中存储与输入数据扇区的片段相关联的标签。 包括交错数据片的介质扇区按照由标签缓冲器存储的标签顺序从随机存取缓冲器的存储器槽读出。 随着媒体扇区被从随机存取缓冲器中读出，相应的存储器槽被释放以用于下一个超级扇区的传入片段。

公开(公告)号：US20160034393A1

公开(公告)日：2016-02-04

申请号：US14260463

申请日：2014-04-24

Applicant: LSI Corporation

Inventor： Zhiwei Wu ,  Zhibin Li ,  Kurt J. Worrell ,  Joseph R. Robert ,  Feina Wen

IPC: G06F12/08 ,  G06F3/06

CPC classification number: G06F12/084 ,  G06F3/0608 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/0689 ,  G06F12/0802 ,  G06F12/0871 ,  G06F2003/0691 ,  G06F2003/0692 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/165 ,  G06F2212/21 ,  G06F2212/222 ,  G06F2212/224 ,  G06F2212/251 ,  G06F2212/262 ,  G06F2212/281 ,  G06F2212/282 ,  G06F2212/312 ,  G06F2212/462 ,  G06F2212/6042 ,  G06F2212/70 ,  G06F2212/7203 ,  G11B20/10527

Abstract: The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible memory slots. The random access buffer is configured to store slices of incoming data sectors in free memory slots, where a free memory slot is identified by a status flag associated with a logical address of the free memory slot. Meanwhile, a label buffer is configured to store labels associated with the slices of the incoming data sectors in a sequence based upon an interleaving scheme. Media sectors including the interleaved data slices are read out from the memory slots of the random access buffer in order of the sequence of labels stored by the label buffer. As the media sectors are read out of the random access buffer, the corresponding memory slots are freed up for incoming slices of the next super-sector.

Abstract translation: 本公开涉及一种用于使用包括多个独立可访问的存储器时隙的随机存取缓冲器对数据进行交织的系统和方法。 随机访问缓冲器被配置为在空闲存储器时隙中存储输入数据扇区的片段，其中通过与空闲存储器时隙的逻辑地址相关联的状态标志来识别空闲存储器时隙。 同时，标签缓冲器被配置为基于交织方案在序列中存储与输入数据扇区的片段相关联的标签。 包括交错数据片的介质扇区按照由标签缓冲器存储的标签顺序从随机存取缓冲器的存储器槽读出。 随着媒体扇区被从随机存取缓冲器中读出，相应的存储器槽被释放以用于下一个超级扇区的传入片段。

公开(公告)号：US20150324136A1

公开(公告)日：2015-11-12

申请号：US14271588

申请日：2014-05-07

Applicant: LSI Corporation

Inventor： Xiangdong Guo ,  Zhibin Li ,  Zhiwei Wu ,  Rui Shen

IPC: G06F3/06

CPC classification number: G06F3/0689 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/0676 ,  G06F5/06 ,  G06F2003/0692 ,  G06F2205/063 ,  G06F2205/064

Abstract: An apparatus having first-in-first-out storage and reserved storage is disclosed. In one or more embodiments, the apparatus includes memory circuitry having first-in-first-out storage and reserved storage. The first-in-first-out storage and the reserved storage include an array of data elements having contiguous addresses across the first-in-first-out storage and the reserved storage. The memory circuitry includes a first-in-first-out pointer for referencing an index corresponding to a data element of the array of data elements of the first-in-first-out storage to be read and a read pointer mapped to the first-in-first-out pointer and for referencing a memory location of the data element to be read. The read pointer is mapped such that the read pointer does not reference a plurality of data elements stored in the reserved storage.

Abstract translation: 公开了一种具有先进先出存储和预留存储的装置。 在一个或多个实施例中，该装置包括具有先进先出存储和预留存储的存储器电路。 先进先出的存储和预留存储器包括具有穿过先进先出存储和预留存储器的连续地址的数据元素阵列。 存储器电路包括用于引用对应于要读取的先进先出存储器的数据元素阵列的数据元素的索引的索引的先入先出指针，以及映射到第一 - 先进先出指针，并用于引用要读取的数据元素的存储器位置。 读指针被映射，使得读指针不引用存储在保留存储器中的多个数据元素。