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    Data sequence detection in band-limited channels using two stream detector architecture
    1.
    发明授权
    Data sequence detection in band-limited channels using two stream detector architecture 有权
    使用两个流检测器架构的带限通道中的数据序列检测

    公开(公告)号：US08810950B1

    公开(公告)日：2014-08-19

    申请号：US13842259

    申请日：2013-03-15

    Applicant: LSI Corporation

    Inventor： Madhusudan Kalluri ,  Sathiyanarayanan Sampath Kumar ,  Jianqing Chen ,  Lei Chen ,  Johnson Yen ,  Sancar K. Olcay

    IPC: G11B5/035 ,  H03H7/30 ,  H03H7/40 ,  H03K5/159

    CPC classification number: G11B20/10046

    Abstract: A method for data sequence detection includes generating a first sample stream, equalizing the first sample stream to generate a first equalized sample stream, and buffering the first equalized sample stream. The first sample stream is interpolated to generate a second sample stream. The second sample stream is equalized to generate a second equalized sample stream. In a first processing path, the samples of the buffered first equalized sample stream are filtered using a first noise predictive filter bank to generate a first set of noise sample streams. In a second parallel processing path, the samples of the buffered first equalized sample stream are interpolated using a second interpolation filter to generate an interpolated sample stream and the interpolated sample stream is filtered to generate a second set of noise sample streams. The first equalized sample stream and the second equalized sample stream are processed to generate adapted filter coefficients for the second interpolation filter. The first and second set of noise sample streams are diversity combined to generate a set of combined noise sample streams. A data sequence is detected using the set of combined noise sample streams.

    Abstract translation: 一种用于数据序列检测的方法包括生成第一样本流，使第一样本流均衡以产生第一均衡样本流，以及缓冲第一均衡样本流。 内插第一采样流以产生第二采样流。 第二样本流被均衡以产生第二均衡样本流。 在第一处理路径中，使用第一噪声预测滤波器组对缓冲的第一均衡采样流的采样进行滤波，以产生第一组噪声采样流。 在第二并行处理路径中，使用第二内插滤波器对缓冲的第一均衡采样流的样本进行内插，以生成内插采样流，并且内插采样流被滤波以产生第二组噪声采样流。 处理第一均衡采样流和第二均衡采样流，以生成适用于第二内插滤波器的滤波器系数。 第一和第二组噪声采样流被分集组合以产生一组组合的噪声采样流。 使用组合的噪声采样流来检测数据序列。

    LEH Memory Module Architecture Design in the Multi-Level LDPC Coded Iterative System
    2.
    发明申请
    LEH Memory Module Architecture Design in the Multi-Level LDPC Coded Iterative System 有权
    LEH存储器模块体系结构在多级LDPC编码迭代系统中的设计

    公开(公告)号：US20140122971A1

    公开(公告)日：2014-05-01

    申请号：US13663006

    申请日：2012-10-29

    Applicant: LSI CORPORATION

    Inventor： Zongwang Li ,  Lei Chen ,  Shaohua Yang ,  Johnson Yen

    IPC: H03M13/13 ,  H03M13/27

    CPC classification number: H03M13/6505 ,  H03M13/1111 ,  H03M13/1137 ,  H03M13/27 ,  H03M13/6331

    Abstract: A memory in a LDPC decoding system includes data banks organized into a ping-pong memory. The ping-pong memory is connected to an interleaver and a de-interleaver. The interleaver interleaves L values; the interleaved L values are then stored in the ping-pong memory. A LDPC decoder retrieves L values from the ping-pong memory and returns E values to the ping-pong memory. The de-interleaver de-interleaves the E values and sends data to a LE queue and HD queue.

    Abstract translation: LDPC解码系统中的存储器包括组织成乒乓存储器的数据库。 乒乓存储器连接到交织器和解交织器。 交织器交织L值; 然后将交错的L值存储在乒乓存储器中。 LDPC解码器从乒乓存储器检索L值并将E值返回给乒乓存储器。 解交织器对E值进行解交织，并将数据发送到LE队列和HD队列。

    Buffer for Managing Data Samples in a Read Channel
    4.
    发明申请
    Buffer for Managing Data Samples in a Read Channel 有权
    用于管理读通道中的数据样本的缓冲区

    公开(公告)号：US20140223114A1

    公开(公告)日：2014-08-07

    申请号：US13760447

    申请日：2013-02-06

    Applicant: LSI CORPORATION

    Inventor： Herjen Wang ,  Ngok Ying Chu ,  Johnson Yen ,  Lei Chen

    IPC: G06F12/00

    CPC classification number: G06F12/00 ,  G11C29/022 ,  G11C29/028

    Abstract: The disclosure is directed to a system for managing data samples utilizing a time division multiplexing controller to allocate time slots for accessing a sample memory according to one or more modes of operation. The time division multiplexing controller is configured to allocate slots for concurrent access by a sample controller, a plurality of detectors, and a noise predictive calibrator when a normal mode is enabled. The time division multiplexing controller is further configured to allocate slots excluding at least one of the sample controller, the plurality of detectors, and the noise predictive calibrator from accessing the sample memory when a retry mode is enabled. In some embodiments, the time division multiplexing controller is further configured to allocate time slots for one or more clients other than the sample controller, the plurality of detectors, and the noise predictive calibrator.

    Abstract translation: 本公开涉及一种利用时分复用控制器来管理数据样本的系统，以分配用于根据一种或多种操作模式访问采样存储器的时隙。 时分复用控制器被配置为当正常模式被使能时，由采样控制器，多个检测器和噪声预测校准器分配用于并行访问的时隙。 时分复用控制器还被配置为当重试模式被使能时，分配除了样本控制器，多个检测器和噪声预测校准器中的至少一个的时隙以访问采样存储器。 在一些实施例中，时分复用控制器还被配置为为除了采样控制器，多个检测器和噪声预测校准器之外的一个或多个客户端分配时隙。

    DATA RECOVERY USING NO SYNC MARK RETRY
    7.
    发明申请
    DATA RECOVERY USING NO SYNC MARK RETRY 有权
    数据恢复使用无同步标记重试

    公开(公告)号：US20140104719A1

    公开(公告)日：2014-04-17

    申请号：US13650601

    申请日：2012-10-12

    Applicant: LSI CORPORATION

    Inventor： Chu N. Ying ,  Lei Chen ,  Herjen Wang ,  Johnson Yen

    IPC: G06F11/14 ,  G11B20/18

    CPC classification number: G11B5/09 ,  G11B5/59616 ,  G11B20/10222

    Abstract: A read channel is configured to receive at least part of a data fragment read from a storage media into a register, wherein the data fragment is configured to be formatted with a preamble, a sync mark (e.g., a syncMark), and user data, and wherein the data fragment is missing a sync mark. A position in the data fragment is selected, a sync mark is assumed at the selected position. The data is then processed assuming the sync mark is at the selected position of the data fragment to determine whether the data converges. When a determination is made that the data converges, the data is recovered.

    Abstract translation: 读通道被配置为将从存储介质读取的数据片段的至少一部分接收到寄存器中，其中，所述数据片段被配置为使用前导码，同步标记（例如，syncMark）和用户数据来格式化， 并且其中数据片段缺少同步标记。 选择数据片段中的位置，在所选位置处假定同步标记。 假设同步标记位于数据片段的选定位置，则数据被处理，以确定数据是否收敛。 当确定数据收敛时，数据被恢复。

    Data recovery using no sync mark retry
    8.
    发明授权
    Data recovery using no sync mark retry 有权
    数据恢复不使用同步标记重试

    公开(公告)号：US08699164B1

    公开(公告)日：2014-04-15

    申请号：US13650601

    申请日：2012-10-12

    Applicant: LSI Corporation

    Inventor： Chu N. Ying ,  Lei Chen ,  Herjen Wang ,  Johnson Yen

    IPC: G11B5/09

    CPC classification number: G11B5/09 ,  G11B5/59616 ,  G11B20/10222

    Abstract: A read channel is configured to receive at least part of a data fragment read from a storage media into a register, wherein the data fragment is configured to be formatted with a preamble, a sync mark (e.g., a syncMark), and user data, and wherein the data fragment is missing a sync mark. A position in the data fragment is selected, a sync mark is assumed at the selected position. The data is then processed assuming the sync mark is at the selected position of the data fragment to determine whether the data converges. When a determination is made that the data converges, the data is recovered.

    Abstract translation: 读通道被配置为将从存储介质读取的数据片段的至少一部分接收到寄存器中，其中，所述数据片段被配置为使用前导码，同步标记（例如，syncMark）和用户数据来格式化， 并且其中数据片段缺少同步标记。 选择数据片段中的位置，在所选位置处假定同步标记。 假设同步标记位于数据片段的选定位置，则数据被处理，以确定数据是否收敛。 当确定数据收敛时，数据被恢复。

    LEH memory module architecture design in the multi-level LDPC coded iterative system
    9.
    发明授权
    LEH memory module architecture design in the multi-level LDPC coded iterative system 有权
    LEH存储器模块架构设计在多级LDPC编码迭代系统中

    公开(公告)号：US09219504B2

    公开(公告)日：2015-12-22

    申请号：US13663006

    申请日：2012-10-29

    Applicant: LSI Corporation

    Inventor： Zongwang Li ,  Lei Chen ,  Shaohua Yang ,  Johnson Yen

    IPC: H03M13/00 ,  H03M13/27 ,  H03M13/11

    CPC classification number: H03M13/6505 ,  H03M13/1111 ,  H03M13/1137 ,  H03M13/27 ,  H03M13/6331

    Abstract: A memory in a LDPC decoding system includes data banks organized into a ping-pong memory. The ping-pong memory is connected to an interleaver and a de-interleaver. The interleaver interleaves L values; the interleaved L values are then stored in the ping-pong memory. A LDPC decoder retrieves L values from the ping-pong memory and returns E values to the ping-pong memory. The de-interleaver de-interleaves the E values and sends data to a LE queue and HD queue.

    Abstract translation: LDPC解码系统中的存储器包括组织成乒乓存储器的数据库。 乒乓存储器连接到交织器和解交织器。 交织器交织L值; 然后将交错的L值存储在乒乓存储器中。 LDPC解码器从乒乓存储器检索L值并将E值返回给乒乓存储器。 解交织器对E值进行解交织，并将数据发送到LE队列和HD队列。

    Buffer for managing data samples in a read channel
    10.
    发明授权
    Buffer for managing data samples in a read channel 有权
    用于管理读取通道中的数据样本的缓冲区

    公开(公告)号：US09189379B2

    公开(公告)日：2015-11-17

    申请号：US13760447

    申请日：2013-02-06

    Applicant: LSI Corporation

    Inventor： Herjen Wang ,  Ngok Ying Chu ,  Johnson Yen ,  Lei Chen

    IPC: G06F12/00 ,  G11C29/02

    CPC classification number: G06F12/00 ,  G11C29/022 ,  G11C29/028

    Abstract: The disclosure is directed to a system for managing data samples utilizing a time division multiplexing controller to allocate time slots for accessing a sample memory according to one or more modes of operation. The time division multiplexing controller is configured to allocate slots for concurrent access by a sample controller, a plurality of detectors, and a noise predictive calibrator when a normal mode is enabled. The time division multiplexing controller is further configured to allocate slots excluding at least one of the sample controller, the plurality of detectors, and the noise predictive calibrator from accessing the sample memory when a retry mode is enabled. In some embodiments, the time division multiplexing controller is further configured to allocate time slots for one or more clients other than the sample controller, the plurality of detectors, and the noise predictive calibrator.

    Abstract translation: 本公开涉及一种利用时分复用控制器来管理数据样本的系统，以分配用于根据一种或多种操作模式访问采样存储器的时隙。 时分复用控制器被配置为当正常模式被使能时，由采样控制器，多个检测器和噪声预测校准器分配用于并行访问的时隙。 时分复用控制器还被配置为当重试模式被使能时，分配除了样本控制器，多个检测器和噪声预测校准器中的至少一个的时隙以访问采样存储器。 在一些实施例中，时分复用控制器还被配置为为除了采样控制器，多个检测器和噪声预测校准器之外的一个或多个客户端分配时隙。

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