公开(公告)号：US09397674B2

公开(公告)日：2016-07-19

申请号：US14145493

申请日：2013-12-31

Applicant: LSI Corporation

Inventor： Pervez M. Aziz ,  Shiva Prasad Kotagiri ,  Sundeep Venkatraman ,  Sunil Srinivasa ,  Amaresh V. Malipatil

IPC: H03D3/24 ,  H03L7/087 ,  H03L7/06

CPC classification number: H03L7/087 ,  H03L7/06 ,  H03L7/0807 ,  H03L7/0814 ,  H03L7/093 ,  H04L7/0058 ,  H04L7/033

Abstract: A clock and data recovery device includes a phase detector, a quantizer, and a loop filter. The phase detector produces a phase error samples at an output representing a phase difference between a phase-adjusted clock and an input data signal. The quantizer, coupled to the output of the phase detector and responsive to high threshold and low threshold values, produces a tri-valued quantized phase error samples at an output. The loop filter filters either the quantized phase error samples or the phase error samples to control the phase-controlled clock. A frequency detector, determining the frequency of jitter present in the input data signal, addresses a look-up table to provide the jitter-frequency dependent high and low threshold values and to control which phase error samples is processed by the loop filter. The frequency detector determines the jitter frequency by taking the ratio of peak values of low pass-filtered phase error samples.

Abstract translation: 时钟和数据恢复装置包括相位检测器，量化器和环路滤波器。 相位检测器在表示相位调整时钟和输入数据信号之间的相位差的输出端产生相位误差采样。 量化器耦合到相位检测器的输出并响应于高阈值和低阈值，在输出端产生三值量化的相位误差样本。 环路滤波器对量化的相位误差样本或相位误差采样进行滤波，以控制相位控制时钟。 确定输入数据信号中存在的抖动频率的频率检测器寻址查找表以提供抖动频率相关的高和低阈值，并且控制环路滤波器处理哪些相位误差采样。 频率检测器通过取低通滤波相位误差样本的峰值比来确定抖动频率。

公开(公告)号：US20150103961A1

公开(公告)日：2015-04-16

申请号：US14053069

申请日：2013-10-14

Applicant: LSI Corporation

Inventor： Amaresh V. Malipatil ,  Shiva Prasad Kotagiri ,  Sundeep Venkatraman ,  Sunil Srinivasa ,  Pervez M. Aziz

IPC: H04L7/00 ,  H04L25/03

CPC classification number: H04B1/10 ,  H04B1/30 ,  H04L7/0016 ,  H04L7/0278 ,  H04L25/03038

Abstract: A frequency band estimator for use in a data receiver or the like to enhance sinusoidal jitter tolerance by the clock and data recovery device (CDR) in the receiver. The detector uses two moving-average filters of different tap lengths that receive a gain-controlled signal from within the CDR. Output signals from the moving average filters are processed to determine a half-wave time period for each output signal by measuring the number clock cycles occurring between transitions of each output signal. The number of clock cycles of the longest half-wave period is compared to multiple values representing frequency limits of various frequency bands to determine which frequency band to classify jitter the gain-controlled signal. The determined frequency band is used to select from a look-up table a set of gain values for use in the CDR.

Abstract translation: 一种在数据接收机等中使用的频带估计器，用于增强接收机中的时钟和数据恢复装置（CDR）的正弦抖动容限。 检测器使用两个不同抽头长度的移动平均滤波器，其接收来自CDR内的增益控制信号。 来自移动平均滤波器的输出信号被处理以通过测量在每个输出信号的转换之间发生的数字时钟周期来确定每个输出信号的半波时间周期。 将最长半波周期的时钟周期数与表示各种频带的频率限制的多个值进行比较，以确定哪个频带将抖动分类为增益控制信号。 确定的频带用于从查找表中选择一组用于CDR中的增益值。

公开(公告)号：US20150188551A1

公开(公告)日：2015-07-02

申请号：US14145493

申请日：2013-12-31

Applicant: LSI Corporation

Inventor： Pervez M. Aziz ,  Shiva Prasad Kotagiri ,  Sundeep Venkatraman ,  Sunil Srinivasa ,  Amaresh V. Malipatil

IPC: H03L7/087 ,  H03L7/06

CPC classification number: H03L7/087 ,  H03L7/06 ,  H03L7/0807 ,  H03L7/0814 ,  H03L7/093 ,  H04L7/0058 ,  H04L7/033

Abstract: A clock and data recovery device includes a phase detector, a quantizer, and a loop filter. The phase detector produces a phase error samples at an output representing a phase difference between a phase-adjusted clock and an input data signal. The quantizer, coupled to the output of the phase detector and responsive to high threshold and low threshold values, produces a tri-valued quantized phase error samples at an output. The loop filter filters either the quantized phase error samples or the phase error samples to control the phase-controlled clock. A frequency detector, determining the frequency of jitter present in the input data signal, addresses a look-up table to provide the jitter-frequency dependent high and low threshold values and to control which phase error samples is processed by the loop filter. The frequency detector determines the jitter frequency by taking the ratio of peak values of low pass-filtered phase error samples.

Abstract translation: 时钟和数据恢复装置包括相位检测器，量化器和环路滤波器。 相位检测器在表示相位调整时钟和输入数据信号之间的相位差的输出端产生相位误差采样。 量化器耦合到相位检测器的输出并响应于高阈值和低阈值，在输出端产生三值量化的相位误差样本。 环路滤波器对量化的相位误差样本或相位误差采样进行滤波，以控制相位控制时钟。 确定输入数据信号中存在的抖动频率的频率检测器寻址查找表以提供抖动频率相关的高和低阈值，并且控制环路滤波器处理哪些相位误差采样。 频率检测器通过取低通滤波相位误差样本的峰值比来确定抖动频率。