公开(公告)号：US06208183B1

公开(公告)日：2001-03-27

申请号：US09302755

申请日：1999-04-30

申请人： Larry B. Li ,  Akbar Ali ,  Matteo Conta

发明人： Larry B. Li ,  Akbar Ali ,  Matteo Conta

IPC分类号： H03L700

CPC分类号： H03L7/081 ,  H03L7/083 ,  H03L7/0891 ,  H03L7/0995 ,  H03L7/183

摘要： A gated-delay locked loop that generates an output clock in phase with and having a frequency which is an integer multiple of the frequency of a reference clock. The gated delay-locked loop includes a voltage-controlled gated oscillator having first and second serially connected voltage-controlled delay elements that each introduce a time delay to produce a first delayed clock and the output clock. An S-R flip-flop receives the first delayed clock on its R-input and either the output clock or the reference clock on its S-input to produce a loop clock. The loop clock is provided to the first delay element. A multiplexer selects the reference clock as the S input to the flip-flop once every N cycles, and selects the output clock as the S input the remaining N−1 cycles. A phase detector, a charge pump and a loop filter compare the phase of the output clock to the phase of the reference clock and apply a voltage to the delay elements to correct any phase differences.

摘要翻译： 门控延迟锁定环，其产生与参考时钟的频率的整数倍的频率相位并且具有频率的输出时钟。 门控延迟锁定环路包括具有第一和第二串联连接的电压控制延迟元件的电压控制选通振荡器，每个引入时间延迟以产生第一延迟时钟和输出时钟。 S-R触发器在其R输入端接收第一个延迟时钟，并在其S输入端接收输出时钟或参考时钟，以产生一个回路时钟。 环路时钟被提供给第一延迟元件。 多路复用器每N个周期选择参考时钟作为触发器的S输入，并选择输出时钟作为S输入剩余的N-1个周期。 相位检测器，电荷泵和环路滤波器将输出时钟的相位与参考时钟的相位进行比较，并向延迟元件施加电压以校正任何相位差。

公开(公告)号：US06265944B1

公开(公告)日：2001-07-24

申请号：US09405766

申请日：1999-09-27

申请人： Matteo Conta ,  Akbar Ali

发明人： Matteo Conta ,  Akbar Ali

IPC分类号： H03F345

CPC分类号： H03F3/45188 ,  H03F2203/45544 ,  H03F2203/45554 ,  H03F2203/45594 ,  H03F2203/45631 ,  H03F2203/45702

摘要： RF voltage amplifier circuits which have high voltage amplifier gain and input signal frequency range, and a method for boosting the voltage amplifier gain and input signal frequency range in such circuits is provided. A method includes the steps of providing a voltage amplifier having a transistor with the grounded source and the drain connected to a power supply via a resistive load, and providing an integrated inductor for biasing the transistor, having an inductor connecting an input signal terminal to the gate of the transistor and a capacitor connecting the gate and the source of the transistor. The next step includes selecting a resonant frequency of the integrated inductor at a frequency where the voltage amplifier gain is starting to roll-off, for boosting the voltage amplifier gain and the input signal frequency range. The integrated inductor preferably operates at a resonant frequency approximately matching the roll-off frequency of the voltage amplifier. In another embodiment the voltage amplifier has a common emitter (CE) gain stage, a common base (CB) cascade stage directly-coupled to the CE gain stage, and a constant current mirror source. The integrated inductor has two inductors, each connected to one input of the amplifier input signal pair and a capacitor connecting the inductors. This circuit can be adapted for fully differential operation mode or for single ended operation mode.

摘要翻译： 提供具有高电压放大器增益和输入信号频率范围的RF电压放大器电路，以及用于升高这些电路中的电压放大器增益和输入信号频率范围的方法。 一种方法包括以下步骤：提供具有晶体管的电压放大器，其中接地源极和漏极经由电阻性负载连接到电源，并且提供用于偏置晶体管的集成电感器，其具有将输入信号端子连接到 晶体管的栅极和连接晶体管的栅极和源极的电容器。 下一步包括以电压放大器增益开始滚降的频率选择集成电感器的谐振频率，以升高电压放大器增益和输入信号频率范围。 集成电感器优选以大致匹配电压放大器的滚降频率的谐振频率工作。 在另一个实施例中，电压放大器具有公共发射极（CE）增益级，直接连接到CE增益级的公共基极（CB）级联级和恒定电流镜源。 集成电感器具有两个电感器，每个电感器连接到放大器输入信号对的一个输入端和连接电感器的电容器。 该电路可适用于全差分运行模式或单端运行模式。

公开(公告)号：US06215363B1

公开(公告)日：2001-04-10

申请号：US09405752

申请日：1999-09-27

申请人： Matteo Conta ,  Akbar Ali

发明人： Matteo Conta ,  Akbar Ali

IPC分类号： H03L7089

CPC分类号： H03L7/081 ,  H03L7/0802 ,  H03L7/0895 ,  H03L7/18

摘要： In a phase lock loop, a charge pump includes a current mirror circuit. The current mirror circuit contains a bias current source and a current mirror source which mirrors the current of the bias current source. The current mirror source is turned on and off in accordance with an output signal from a phase detector to produce correction signals for a VCO. To conserve power, circuits are provided for turning the bias current source on just before it is needed by the current mirror source and for turning the bias current source off just after the current mirror source turns off.

摘要翻译： 在锁相环中，电荷泵包括电流镜电路。 电流镜电路包含偏置电流源和反映偏置电流源的电流的电流镜源。 电流镜源根据来自相位检测器的输出信号导通和截止，以产生用于VCO的校正信号。 为了节省电力，提供电路用于在电流镜源需要之前转动偏置电流源，并且在电流镜源关闭之后关闭偏置电流源。

公开(公告)号：US06211743B1

公开(公告)日：2001-04-03

申请号：US09314898

申请日：1999-05-19

申请人： Woogeun Rhee ,  Akbar Ali ,  Matteo Conta

发明人： Woogeun Rhee ,  Akbar Ali ,  Matteo Conta

IPC分类号： H03L102

CPC分类号： H03L7/099 ,  H03L1/02 ,  H03L7/0891 ,  H03L7/093

摘要： A phase-locked loop includes a phase/frequency detector, a charge pump, a loop filter, an oscillator and a feedback circuit coupled between the oscillator and the phase/frequency detector. The loop filter includes a first temperature-variable well resistor and has a gain directly related to resistance of the first resistor. An oscillator coupled to the loop filter includes a voltage-to-current converter that generates a reference current based on the loop filter voltage, and a current-controlled oscillator that generates the output clock based on the value of the reference current. The voltage-to-current converter includes a first transistor that receives the loop filter voltage at a gate and a second temperature-variable well resistor coupled to the source of the first transistor. The oscillator gain is indirectly related to the resistance of the second resistor. The second well resistor and first well resistor have substantially equal resistances and substantially equal temperature coefficients. Since the loop bandwidth includes the product of the loop filter gain and oscillator gain, the effect of temperature-induced resistance variations on loop bandwidth is minimized.

摘要翻译： 锁相环包括相位/频率检测器，电荷泵，环路滤波器，振荡器和耦合在振荡器和相位/频率检测器之间的反馈电路。 环路滤波器包括第一温度可变阱电阻器，并具有与第一电阻器的电阻直接相关的增益。 耦合到环路滤波器的振荡器包括基于环路滤波器电压产生参考电流的电压 - 电流转换器，以及基于参考电流的值产生输出时钟的电流控制振荡器。 电压 - 电流转换器包括接收栅极处的环路滤波器电压的第一晶体管和耦合到第一晶体管源极的第二温度可变阱电阻器。 振荡器增益与第二个电阻的电阻间接相关。 第二阱电阻器和第一阱电阻器具有基本相等的电阻和基本相等的温度系数。 由于环路带宽包括环路滤波器增益和振荡器增益的乘积，因此温度感应电阻变化对环路带宽的影响最小化。

公开(公告)号：US07109805B2

公开(公告)日：2006-09-19

申请号：US10902746

申请日：2004-07-29

申请人： Chang-Hyeon Lee ,  Hoon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Hoon Lee ,  Akbar Ali

IPC分类号： H03L7/00 ,  H03C3/06 ,  H03M3/00

CPC分类号： H03C3/0933 ,  H03C3/0925

摘要： A system for direct modulation is disclosed. Embodiments of the direct modulator for shift-keying modulation include impressing baseband data on a radio frequency (RF) signal at an oscillator by controlling a digital divider using a sigma-delta modulator.

摘要翻译： 公开了一种用于直接调制的系统。 用于移位键控调制的直接调制器的实施例包括通过使用Σ-Δ调制器控制数字分频器在振荡器处对射频（RF）信号施加基带数据。

公开(公告)号：US20050227629A1

公开(公告)日：2005-10-13

申请号：US10821531

申请日：2004-04-09

申请人： Akbar Ali ,  James Young

发明人： Akbar Ali ,  James Young

IPC分类号： H03L7/22 ,  H04B1/38

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US07747237B2

公开(公告)日：2010-06-29

申请号：US10821531

申请日：2004-04-09

申请人： Akbar Ali ,  James P. Young

发明人： Akbar Ali ,  James P. Young

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US07259633B2

公开(公告)日：2007-08-21

申请号：US11137210

申请日：2005-05-24

申请人： Chang-Hyeon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Akbar Ali

IPC分类号： H03L7/00 ,  H03L7/093

CPC分类号： H03L7/093 ,  H03C3/0925 ,  H03C3/0933 ,  H03L7/07 ,  H03L7/0891 ,  H03L7/197 ,  H03L7/1976

摘要： According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

摘要翻译： 根据一个示例性实施例，频率合成器模块包括环路滤波器，其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时，环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列，其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

公开(公告)号：US20060267697A1

公开(公告)日：2006-11-30

申请号：US11137210

申请日：2005-05-24

申请人： Chang-Hyeon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Akbar Ali

IPC分类号： H03L7/00

CPC分类号： H03L7/093 ,  H03C3/0925 ,  H03C3/0933 ,  H03L7/07 ,  H03L7/0891 ,  H03L7/197 ,  H03L7/1976

摘要： According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

摘要翻译： 根据一个示例性实施例，频率合成器模块包括环路滤波器，其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时，环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列，其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

公开(公告)号：US06377129B1

公开(公告)日：2002-04-23

申请号：US09302754

申请日：1999-04-30

申请人： Woogeun Rhee ,  Akbar Ali

发明人： Woogeun Rhee ,  Akbar Ali

IPC分类号： H03K3282

CPC分类号： H03K3/354

摘要： An oscillator has a slope-fixing circuit that generates a control signal and fixes the slope of the control signal, a swing-fixing circuit that fixes the swing of the control signal, and a switching block that generates an output signal having a frequency derived from the swing and the slope of the control signal. The slope-fixing circuit comprises a fixed timing capacitor C1 in parallel with a plurality of switchable timing capacitors C2 . . . CN to provide an effective capacitance C. The slope of the control signal is determined by the ratio of a control current I to the effective capacitance C. The swing-fixing circuit comprises a replica cell that accepts a programmable reference voltage VREF and provides a fixed voltage swing VSW=VDD−VREF across a pair of load transistors. The switching block comprises a pair of switching transistors that alternate between “on” and “off” states depending on the value of the control signal to produce an oscillating output signal. The frequency of the output signal is given by I 4 ⁢ CV SW .

摘要翻译： 振荡器具有产生控制信号并固定控制信号的斜率的斜坡固定电路，固定控制信号的摆动的摆动固定电路以及产生具有从...得到的频率的输出信号的开关块 控制信号的摆幅和斜率。 斜坡固定电路包括与多个可切换定时电容器C2并联的固定定时电容器C1。 。 。 CN以提供有效电容C.控制信号的斜率由控制电流I与有效电容C的比确定。摆幅固定电路包括接受可编程参考电压VREF的复制单元并提供固定的 一对负载晶体管的摆幅VSW = VDD-VREF。 切换块包括一对开关晶体管，其根据控制信号的值在“导通”和“断开”状态之间交替以产生振荡输出信号。 输出信号的频率由下式给出