Method and apparatus for transmitting data in adjustable-sized packets
    4.
    发明授权
    Method and apparatus for transmitting data in adjustable-sized packets 失效
    用于以可调节大小的数据包传输数据的方法和装置

    公开(公告)号:US4691314A

    公开(公告)日:1987-09-01

    申请号:US792757

    申请日:1985-10-30

    摘要: A data telecommunications system and method is provided for sending a data stream of characters in distinct data packets between two units of data terminal equipment (which can be either terminals and/or computers) connected over communication lines. A modem is connected between each unit of data terminal equipment and the communication lines, and one initiating modem includes a means for changing the packet size of the data which is transmitted. The receiving modem checks the packets for errors, and if errors are found, the packet is retransmitted. The initiating modem counts the number of transmissions of data packets as well as the number of retransmissions of data packets. A ratio of retransmissions to transmissions is used to determine the optimum packet size. The packet size is continually subject to change as the ratio changes during transmission.

    摘要翻译: 提供了一种数据电信系统和方法,用于在通过通信线路连接的数据终端设备(可以是终端和/或计算机)的两个单元之间发送不同数据分组中的字符的数据流。 调制解调器连接在每个数据终端设备单元和通信线路之间,一个启动调制解调器包括用于改变发送的数据的分组大小的装置。 接收调制解调器检查数据包是否有错误,如果发现错误,则重传数据包。 启动调制解调器对数据分组的传输次数以及数据分组的重发次数进行计数。 使用重传与传输的比率来确定最佳分组大小。 随着传输过程中比例的变化,数据包的大小会不断变化。

    Apparatus for maximizing bus utilization
    5.
    发明授权
    Apparatus for maximizing bus utilization 失效
    最大化总线利用率的装置

    公开(公告)号:US4543629A

    公开(公告)日:1985-09-24

    申请号:US690836

    申请日:1985-01-14

    IPC分类号: G06F13/362 G06F1/04

    CPC分类号: G06F13/362

    摘要: An interactive terminal computer system is disclosed having a system bus for communicating between elements of the computer system which has apparatus for permitting the execution of a maximum number of concurrent bus cycles without interference with each other.

    摘要翻译: 公开了一种交互式终端计算机系统,其具有用于在计算机系统的元件之间通信的系统总线,该系统总线具有用于允许执行最大数量的并发总线周期而不彼此干扰的装置。

    Write protected memory
    6.
    发明授权
    Write protected memory 失效
    写保护内存

    公开(公告)号:US4489380A

    公开(公告)日:1984-12-18

    申请号:US364381

    申请日:1982-04-01

    IPC分类号: G06F12/14 G06F13/00

    CPC分类号: G06F12/1433

    摘要: An interactive terminal includes a central processor unit (CPU) having a microprocessor and a random access memory (RAM). Signals from the microprocessor place the RAM in a write protect mode. If the RAM receives a write instruction from the microprocessor when the RAM is in the write protect mode, then an illegal condition is indicated and a nonmaskable interrupt is generated to allow the terminal to recover. When the RAM is in the write protect mode, signals from the microprocessor restore the RAM to its normal read/write mode.

    摘要翻译: 交互式终端包括具有微处理器和随机存取存储器(RAM)的中央处理器单元(CPU)。 来自微处理器的信号将RAM置于写保护模式。 如果在RAM处于写保护模式时RAM接收到来自微处理器的写指令,则指示非法状态,并产生不可屏蔽的中断以允许终端恢复。 当RAM处于写保护模式时,来自微处理器的信号将RAM恢复到正常的读/写模式。

    Bus arbitration logic
    7.
    发明授权
    Bus arbitration logic 失效
    总线仲裁逻辑

    公开(公告)号:US4535330A

    公开(公告)日:1985-08-13

    申请号:US372907

    申请日:1982-04-29

    CPC分类号: G06F13/364 G06F13/30

    摘要: An interactive computer terminal system having a bus for communication between elements of the system is disclosed having apparatus for assigning control of the computer bus on a predetermined order of priority. The CPU receives requests from computer system elements and assigns time slots for use of the system bus by arbitrating among various resources competing for access to the bus.

    摘要翻译: 公开了具有用于在系统的元件之间进行通信的总线的交互式计算机终端系统,具有以预定优先顺序分配计算机总线的控制的装置。 CPU从计算机系统元件接收请求,并通过在竞争访问总线的各种资源之间进行仲裁来分配使用系统总线的时隙。