公开(公告)号：US10409735B2

公开(公告)日：2019-09-10

申请号：US15133864

申请日：2016-04-20

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Kuen Long Chang ,  Yu Chen Wang ,  Ken Hui Chen

IPC: G06F13/14 ,  G06F13/12 ,  G06F13/364 ,  G06F12/02 ,  G06F13/42 ,  G06F13/40

Abstract: An electronic device includes a processor coupled to a memory device, through a data bus to receive and transmit bits on the data bus. The processor is configured to transmit a message including a first bit indicative of controlling the data bus, address bits indicative of an address identifying the memory device, and a second bit indicative of whether the processor intends to read data from or write data to the memory device; and transmit a third bit indicative of a mode of operation of the memory device.

公开(公告)号：US09514088B2

公开(公告)日：2016-12-06

申请号：US14619336

申请日：2015-02-11

Applicant: Macronix International Co., Ltd.

Inventor： Ken Hui Chen ,  Kuen Long Chang ,  Yu Chen Wang

IPC: H04L27/10 ,  G06F13/42 ,  G06F13/16 ,  H04L25/49 ,  G11B20/14 ,  H03M5/12

CPC classification number: G06F13/4291 ,  G06F13/1689 ,  G06F13/4234 ,  G11B20/1419 ,  H03M5/12 ,  H04L25/4904

Abstract: A method for command processing in a memory controller includes receiving a serial input signal including a series of binary digits, capturing the binary digits at ones of odd locations or even locations of the serial input signal to form a first sub-series, capturing the binary digits at other ones of the odd locations or the even locations of the serial input signal to form a second sub-series, comparing the first and second sub-series, and performing a command represented by the first sub-series, if the first and second sub-series are complementary to each other.

Abstract translation: 一种用于在存储器控制器中进行命令处理的方法，包括接收包括一系列二进制数字的串行输入信号，捕获串行输入信号的奇数位或偶数位置处的二进制数位以形成第一子序列，捕获二进制数 在串行输入信号的奇数位置或偶数位置的其他位置处的数字，以形成第二子序列，比较第一和第二子序列，并执行由第一子序列表示的命令，如果第一和第 第二个子系列互为补充。