公开(公告)号：US10217754B2

公开(公告)日：2019-02-26

申请号：US14278981

申请日：2014-05-15

Applicant: MACRONIX International Co., Ltd.

Inventor： Ya-Jung Tsai ,  Chun-Lien Su ,  Hsin-Fu Lin ,  Hung-Chi Chen

IPC: H01L27/115 ,  H01L27/11521 ,  H01L29/788 ,  H01L29/66 ,  H01L21/265 ,  H01L29/423 ,  H01L21/762 ,  H01L29/78

Abstract: Provided is a method of fabricating a memory device including performing an ion implantation process by using a mask layer as an implanting mask, so as to form a first embedded doped region and a second embedded doped region in a substrate. The first embedded doped region extends along the first direction, passes through the control gate, and is electrically connected to the first doped region, the second doped region and the third doped region at two sides of control gates. The second embedded doped region extends along the second direction, is located in the substrate under the third doped region, and electrically connected to the third doped region. The first embedded doped region is electrically connected to the second embedded doped region.

公开(公告)号：US20150333077A1

公开(公告)日：2015-11-19

申请号：US14278981

申请日：2014-05-15

Applicant: MACRONIX International Co., Ltd.

Inventor： Ya-Jung Tsai ,  Chun-Lien Su ,  Hsin-Fu Lin ,  Hung-Chi Chen

IPC: H01L27/115 ,  H01L29/423 ,  H01L21/265 ,  H01L29/788 ,  H01L29/66

CPC classification number: H01L27/11521 ,  H01L21/26586 ,  H01L21/762 ,  H01L21/76224 ,  H01L29/42324 ,  H01L29/66666 ,  H01L29/66825 ,  H01L29/7827 ,  H01L29/788 ,  H01L29/7881

Abstract: Provided is a method of fabricating a memory device including performing an ion implantation process by using a mask layer as an implanting mask, so as to form a first embedded doped region and a second embedded doped region in a substrate. The first embedded doped region extends along the first direction, passes through the control gate, and is electrically connected to the first doped region, the second doped region and the third doped region at two sides of control gates. The second embedded doped region extends along the second direction, is located in the substrate under the third doped region, and electrically connected to the third doped region. The first embedded doped region is electrically connected to the second embedded doped region.

Abstract translation: 提供了一种制造存储器件的方法，包括通过使用掩模层作为注入掩模来执行离子注入工艺，以便在衬底中形成第一嵌入掺杂区域和第二嵌入掺杂区域。 第一嵌入式掺杂区域沿着第一方向延伸，通过控制栅极，并且在控制栅极的两侧电连接到第一掺杂区域，第二掺杂区域和第三掺杂区域。 第二嵌入掺杂区域沿着第二方向延伸，位于第三掺杂区域下方的衬底中，并电连接到第三掺杂区域。 第一嵌入式掺杂区域电连接到第二嵌入掺杂区域。