公开(公告)号：US09479365B2

公开(公告)日：2016-10-25

申请号：US14737513

申请日：2015-06-12

申请人： MEDIATEK INC.

发明人： Tsung-Hsin Chou ,  Chih-Hsien Lin ,  Huai-Te Wang ,  Bo-Jiun Chen ,  Yan-Bin Luo

IPC分类号： H03H7/30 ,  H04L25/03

CPC分类号： H04L25/03057 ,  H04L25/03885 ,  H04L2025/03484 ,  H04L2025/0349 ,  H04L2025/03777 ,  H04L2025/03808

摘要： A method for performing loop unrolled decision feedback equalization (DFE) and an associated apparatus are provided. The method includes: receiving a tap control signal and an offset control signal from a digital domain of a DFE receiver in an electronic device, and generating DFE information respectively corresponding to the tap control signal and the offset control signal in an analog domain of the DFE receiver; broadcasting the DFE information respectively corresponding to the tap control signal and the offset control signal toward comparators in the DFE receiver; utilizing the comparators to perform comparison operations according to the DFE information respectively corresponding to the tap control signal and the offset control signal to generate comparison results; and selectively adjusting the tap control signal and the offset control signal according to the comparison results, to optimize the DFE information respectively corresponding to the tap control signal and the offset control signal, respectively.

摘要翻译： 提供了一种用于执行循环展开的判决反馈均衡（DFE）和相关联的装置的方法。 该方法包括：从电子设备中的DFE接收机的数字域接收抽头控制信号和偏移控制信号，并且在DFE的模拟域中产生分别对应于抽头控制信号和偏移控制信号的DFE信息 接收器 将分别对应于抽头控制信号和偏移控制信号的DFE信息广播到DFE接收机中的比较器; 利用比较器根据分别对应于抽头控制信号和偏移控制信号的DFE信息执行比较操作，以产生比较结果; 并且根据比较结果选择性地调整抽头控制信号和偏移控制信号，分别优化分别对应于抽头控制信号和偏移控制信号的DFE信息。

公开(公告)号：US20160056980A1

公开(公告)日：2016-02-25

申请号：US14740264

申请日：2015-06-16

申请人： MEDIATEK INC.

发明人： Huai-Te Wang ,  Tsung-Hsin Chou ,  Chih-Hsien Lin ,  Bo-Jiun Chen ,  Yan-Bin Luo

IPC分类号： H04L25/03 ,  H03L7/099 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095

CPC分类号： H04L25/03057 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095 ,  H03L7/099 ,  H04L7/0025 ,  H04L7/0331

摘要： A method for performing data sampling control in an electronic device and an associated apparatus are provided, where the method includes the steps of: detecting whether a data pattern of a received signal of a decision feedback equalizer (DFE) receiver in the electronic device matches a predetermined data pattern, to selectively trigger a data sampling time shift configuration of the DFE receiver; and when the data sampling time shift configuration is triggered, utilizing a phase shift clock, rather than a normal clock corresponding to a normal configuration of the DFE receiver, as an edge sampler clock of an edge sampler in the DFE receiver, to lock onto edge timing of the received signal, and controlling the phase shift clock and the normal clock to have different phases, respectively, to shift data sampling time of the DFE receiver, for performing data sampling in the DFE receiver.

摘要翻译： 提供了一种在电子设备和相关设备中执行数据采样控制的方法，其中该方法包括以下步骤：检测电子设备中的判决反馈均衡器（DFE）接收机的接收信号的数据模式是否匹配 预定数据模式，以选择性地触发DFE接收机的数据采样时移配置; 并且当触发数据采样时移配置时，利用相移时钟而不是与DFE接收机的正常配置对应的正常时钟作为DFE接收机中的边缘采样器的边缘采样器时钟来锁定到边缘 接收信号的定时，并且分别控制相移时钟和正常时钟以具有不同的相位，以移位DFE接收机的数据采样时间，以便在DFE接收机中执行数据采样。

公开(公告)号：US20170085234A1

公开(公告)日：2017-03-23

申请号：US15147902

申请日：2016-05-05

申请人： MEDIATEK INC.

发明人： Huai-Te Wang

IPC分类号： H03F3/50 ,  H03F1/34

CPC分类号： H03F3/505 ,  H03F1/342 ,  H03F2200/129 ,  H03F2200/144 ,  H03F2200/21 ,  H03F2200/303 ,  H03F2200/42 ,  H03F2200/69 ,  H03F2203/45061 ,  H03F2203/45084 ,  H03F2203/5024

摘要： An apparatus for performing capacitor amplification in an electronic device may include a first resistor and a second resistor that are connected in series and coupled between a set of input terminals of a receiver in the electronic device, a common mode capacitor having a first terminal coupled to a common mode terminal and having a second terminal, and an alternating current (AC)-coupled amplifier that is coupled between the common mode terminal and the second terminal of the common mode capacitor. The first resistor and the second resistor may be arranged for obtaining a common mode voltage at the common mode terminal between the first resistor and the second resistor. In addition, the common mode capacitor may be arranged for reducing a common mode return loss. Additionally, the AC-coupled amplifier may be arranged for performing capacitor amplification for the common mode capacitor.

公开(公告)号：US20160065397A1

公开(公告)日：2016-03-03

申请号：US14737513

申请日：2015-06-12

申请人： MEDIATEK INC.

发明人： Tsung-Hsin Chou ,  Chih-Hsien Lin ,  Huai-Te Wang ,  Bo-Jiun Chen ,  Yan-Bin Luo

IPC分类号： H04L25/03

CPC分类号： H04L25/03057 ,  H04L25/03885 ,  H04L2025/03484 ,  H04L2025/0349 ,  H04L2025/03777 ,  H04L2025/03808

摘要： A method for performing loop unrolled decision feedback equalization (DFE) and an associated apparatus are provided. The method includes: receiving a tap control signal and an offset control signal from a digital domain of a DFE receiver in an electronic device, and generating DFE information respectively corresponding to the tap control signal and the offset control signal in an analog domain of the DFE receiver; broadcasting the DFE information respectively corresponding to the tap control signal and the offset control signal toward comparators in the DFE receiver; utilizing the comparators to perform comparison operations according to the DFE information respectively corresponding to the tap control signal and the offset control signal to generate comparison results; and selectively adjusting the tap control signal and the offset control signal according to the comparison results, to optimize the DFE information respectively corresponding to the tap control signal and the offset control signal, respectively.

摘要翻译： 提供了一种用于执行循环展开的判决反馈均衡（DFE）和相关联的装置的方法。 该方法包括：从电子设备中的DFE接收机的数字域接收抽头控制信号和偏移控制信号，并且在DFE的模拟域中产生分别对应于抽头控制信号和偏移控制信号的DFE信息 接收器 将分别对应于抽头控制信号和偏移控制信号的DFE信息广播到DFE接收机中的比较器; 利用比较器根据分别对应于抽头控制信号和偏移控制信号的DFE信息执行比较操作，以产生比较结果; 并且根据比较结果选择性地调整抽头控制信号和偏移控制信号，分别优化分别对应于抽头控制信号和偏移控制信号的DFE信息。

公开(公告)号：US08912819B2

公开(公告)日：2014-12-16

申请号：US13846105

申请日：2013-03-18

申请人： MediaTek Inc.

发明人： Qui-Ting Chen ,  Huai-Te Wang

IPC分类号： H03K19/003 ,  H03K19/00

CPC分类号： H03K19/0005

摘要： A termination circuit is provided. The termination circuit includes a first receiving terminal, a second receiving terminal, a first resistive device, a second resistive device, a third resistive device, a fourth resistive device and a first switch. The first receiving terminal receives a first data signal. The second receiving terminal receives a second data signal. The first resistive device is coupled between a supply voltage and the first receiving terminal. The second resistive device is coupled between the supply voltage and the second receiving terminal. The third resistive device is coupled between the first receiving terminal and a first node. The fourth resistive device is coupled between the second receiving terminal and the first node. The first switch is coupled between the supply voltage and the first node.

摘要翻译： 提供终端电路。 终端电路包括第一接收终端，第二接收终端，第一电阻装置，第二电阻装置，第三电阻装置，第四电阻装置和第一开关。 第一接收终端接收第一数据信号。 第二接收终端接收第二数据信号。 第一电阻器件耦合在电源电压和第一接收端子之间。 第二电阻器件耦合在电源电压和第二接收端子之间。 第三电阻装置耦合在第一接收终端和第一节点之间。 第四电阻装置耦合在第二接收终端和第一节点之间。 第一开关耦合在电源电压和第一节点之间。

公开(公告)号：US09800219B2

公开(公告)日：2017-10-24

申请号：US15147902

申请日：2016-05-05

申请人： MEDIATEK INC.

发明人： Huai-Te Wang

IPC分类号： H03F1/34 ,  H03F3/50

CPC分类号： H03F3/505 ,  H03F1/342 ,  H03F2200/129 ,  H03F2200/144 ,  H03F2200/21 ,  H03F2200/303 ,  H03F2200/42 ,  H03F2200/69 ,  H03F2203/45061 ,  H03F2203/45084 ,  H03F2203/5024

摘要： An apparatus for performing capacitor amplification in an electronic device may include a first resistor and a second resistor that are connected in series and coupled between a set of input terminals of a receiver in the electronic device, a common mode capacitor having a first terminal coupled to a common mode terminal and having a second terminal, and an alternating current (AC)-coupled amplifier that is coupled between the common mode terminal and the second terminal of the common mode capacitor. The first resistor and the second resistor may be arranged for obtaining a common mode voltage at the common mode terminal between the first resistor and the second resistor. In addition, the common mode capacitor may be arranged for reducing a common mode return loss. Additionally, the AC-coupled amplifier may be arranged for performing capacitor amplification for the common mode capacitor.

公开(公告)号：US09379921B2

公开(公告)日：2016-06-28

申请号：US14740264

申请日：2015-06-16

申请人： MEDIATEK INC.

发明人： Huai-Te Wang ,  Tsung-Hsin Chou ,  Chih-Hsien Lin ,  Bo-Jiun Chen ,  Yan-Bin Luo

IPC分类号： H03H7/40 ,  H04L25/03 ,  H03L7/091 ,  H03L7/095 ,  H03L7/087 ,  H03L7/099 ,  H04L7/033 ,  H04L7/00

CPC分类号： H04L25/03057 ,  H03L7/087 ,  H03L7/091 ,  H03L7/095 ,  H03L7/099 ,  H04L7/0025 ,  H04L7/0331

摘要： A method for performing data sampling control in an electronic device and an associated apparatus are provided, where the method includes the steps of: detecting whether a data pattern of a received signal of a decision feedback equalizer (DFE) receiver in the electronic device matches a predetermined data pattern, to selectively trigger a data sampling time shift configuration of the DFE receiver; and when the data sampling time shift configuration is triggered, utilizing a phase shift clock, rather than a normal clock corresponding to a normal configuration of the DFE receiver, as an edge sampler clock of an edge sampler in the DFE receiver, to lock onto edge timing of the received signal, and controlling the phase shift clock and the normal clock to have different phases, respectively, to shift data sampling time of the DFE receiver, for performing data sampling in the DFE receiver.

摘要翻译： 提供了一种在电子设备和相关设备中执行数据采样控制的方法，其中该方法包括以下步骤：检测电子设备中的判决反馈均衡器（DFE）接收机的接收信号的数据模式是否匹配 预定数据模式，以选择性地触发DFE接收机的数据采样时移配置; 并且当触发数据采样时移配置时，利用相移时钟而不是与DFE接收机的正常配置对应的正常时钟作为DFE接收机中的边缘采样器的边缘采样器时钟来锁定到边缘 接收信号的定时，并且分别控制相移时钟和正常时钟以具有不同的相位，以移位DFE接收机的数据采样时间，以便在DFE接收机中执行数据采样。