-
公开(公告)号：US20210168354A1
公开(公告)日：2021-06-03
申请号：US17095765
申请日：2020-11-12
Applicant: MELLANOX TECHNOLOGIES, LTD. , BEAMR IMAGING LTD.
Inventor： Dotan David Levi , Assaf Weissman , Ohad Markus , Uri Gadot , Aviad Raveh , Dror Gill , Nikolay Terterov , Pavel Titkov , Alexey Mitkovets , Alexey Martemyanov , Alexander Zheludkov
IPC: H04N19/105 , H04N19/119 , H04N19/159 , H04N19/51 , H04N19/176
Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.
-
公开(公告)号：US11057637B1
公开(公告)日：2021-07-06
申请号：US16775463
申请日：2020-01-29
Applicant: Mellanox Technologies, Ltd. , BEAMR IMAGING LTD.
Inventor： Dotan David Levi , Assaf Weissman , Ohad Markus , Uri Gadot , Aviad Raveh , Tamar Shoham
IPC: H04N19/52 , H04N19/177 , H04N19/176
Abstract: A video processor includes a memory and a processor. The processor is coupled to memory and is configured to store in the memory (i) multiple raw frames belonging to a Group of Pictures (GOP) to be processed, and (ii) one or more reference frames. The processor is further configured to select for multiple target blocks having a same block-location in respective raw frames associated with a common reference frame, a common search region in the common reference frame, and before selecting another search region, to apply at least two motion estimation operations using at least two of the target blocks and the common search region, to estimate respective at least two Motion Vectors (MVs).
-
公开(公告)号：US20250106386A1
公开(公告)日：2025-03-27
申请号：US18973160
申请日：2024-12-09
Applicant: Mellanox Technologies, Ltd. , BEAMR Imaging Ltd.
Inventor： Dotan David Levi , Assaf Weissman , Ohad Markus , Uri Gadot , Aviad Raveh , Dror Gill , Nikolay Terterov , Pavel Titkov , Alexey Mitkovets , Alexey Martemyanov , Alexander Zheludkov
IPC: H04N19/105 , H04N19/119 , H04N19/159 , H04N19/176 , H04N19/51
Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.
-
公开(公告)号：US12238273B2
公开(公告)日：2025-02-25
申请号：US17095765
申请日：2020-11-12
Applicant: MELLANOX TECHNOLOGIES, LTD. , BEAMR IMAGING LTD.
Inventor： Dotan David Levi , Assaf Weissman , Ohad Markus , Uri Gadot , Aviad Raveh , Dror Gill , Nikolay Terterov , Pavel Titkov , Alexey Mitkovets , Alexey Martemyanov , Alexander Zheludkov
IPC: H04N19/105 , H04N19/119 , H04N19/159 , H04N19/176 , H04N19/51
Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.
-
公开(公告)号：US20210235107A1
公开(公告)日：2021-07-29
申请号：US16775463
申请日：2020-01-29
Applicant: Mellanox Technologies, Ltd. , BEAMR IMAGING LTD.
Inventor： Dotan David Levi , Assaf Weissman , Ohad Markus , Uri Gadot , Aviad Raveh , Tamar Shoham
IPC: H04N19/52 , H04N19/176 , H04N19/177
Abstract: A video processor includes a memory and a processor. The processor is coupled to memory and is configured to store in the memory (i) multiple raw frames belonging to a Group of Pictures (GOP) to be processed, and (ii) one or more reference frames. The processor is further configured to select for multiple target blocks having a same block-location in respective raw frames associated with a common reference frame, a common search region in the common reference frame, and before selecting another search region, to apply at least two motion estimation operations using at least two of the target blocks and the common search region, to estimate respective at least two Motion Vectors (MVs).
-
Patent Agency Ranking
公开(公告)号：US20250165426A1
公开(公告)日：2025-05-22
申请号：US19030411
申请日：2025-01-17
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Daniel Marcovitch , Dotan David Levi , Eyal Srebro , Eliel Peretz , Roee Moyal , Richard Graham , Gil Bloch , Sean Pieper
Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
-
公开(公告)号：US12289388B2
公开(公告)日：2025-04-29
申请号：US17868841
申请日：2022-07-20
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Dotan David Levi , Wojciech Wasko , Natan Manevich
Abstract: In one embodiment, a clock syntonization system includes a first compute node including a first physical hardware clock to operate at a first clock frequency, a second compute node, and an interconnect data bus to transfer data from the first compute node at a data rate indicative of the first clock frequency of the first physical hardware clock, and wherein the second compute node includes clock synchronization circuitry to derive a second clock frequency from the data rate of the transferred data, and provide a clock signal at the derived second clock frequency.
-
公开(公告)号：US20250080315A1
公开(公告)日：2025-03-06
申请号：US18950255
申请日：2024-11-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Dotan David Levi , Ariel Shahar , Shahaf Shuler , Ariel Almog , Eitan Hirshberg , Natan Manevich
IPC: H04L7/00
Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.
-
公开(公告)号：US20250055668A1
公开(公告)日：2025-02-13
申请号：US18448936
申请日：2023-08-13
Applicant: Mellanox Technologies, Ltd.
Inventor： Natan Manevich , Dotan David Levi , Arnon Sattinger , Wojciech Wasko , Maciej Machnikowski , Doron Fael , Ofir Sadeh , Jonathan Oliel
Abstract: In one embodiment, a system includes a digitally controlled oscillator (DCO) to generate a local clock having a local clock frequency, and clock synchronization circuitry to receive from a device a signal indicative of a remote clock frequency, compare measures of the remote clock frequency and the local clock frequency; generate a digital control command based on the comparison; and provide the digital control command to the DCO, wherein the DCO is to adjust the local clock frequency responsively to the digital control command.
-
公开(公告)号：US20240373380A1
公开(公告)日：2024-11-07
申请号：US18228505
申请日：2023-07-31
Applicant: Mellanox Technologies, Ltd.
Inventor： Natan Manevich , Dotan David Levi , Wojciech Wasko , Eitan Zahavi , Yuval Shpigelman , Guy Lederman , Liron Mula , Omer Shabtai
IPC: H04W56/00
Abstract: A system including a device coupled with a link and including a transmitter. The device is to generate a first control block for synchronization via a physical layer of the link, the first control block including a header portion of bits corresponding to a header indicating the block is a control block and a data portion of bits indicating to perform a synchronization handshake. The device is further to transmit, via the link, the first control block comprising the header portion set of bits and the data portion of bit.
-
-
-
-
-
-
-
-
-
Search Results
146
records
(took 0.018 seconds)
