公开(公告)号：US08685630B2

公开(公告)日：2014-04-01

申请号：US13963096

申请日：2013-08-09

Applicant: Micron Technology, Inc.

Inventor： Anton DeVilliers ,  Michael Hyatt

IPC: G03F7/20

CPC classification number: G03F7/2022 ,  G03F7/70466 ,  H01L21/76814

Abstract: Methods of forming a pattern in a material and methods of forming openings in a material to be patterned are disclosed, such as a method that includes exposing first portions of a first material to radiation through at least two apertures of a mask arranged over the first material, shifting the mask so that the at least two apertures overlap a portion of the first portions of the first material, and exposing second portions of the first material to radiation through the at least two apertures. The first portions and the second portions will overlap in such a way that non-exposed portions of the first material are arranged between the first portions and second portions. The non-exposed or exposed portions of the first material may then be removed. The remaining first material may be used as a photoresist mask to form vias in an integrated circuit. The pattern of vias produced have the capability to exceed the current imaging resolution of a single exposure treatment.

Abstract translation: 公开了在材料中形成图案的方法和在待图案化的材料中形成开口的方法，例如包括将第一材料的第一部分暴露于通过布置在第一材料上的掩模的至少两个孔的辐射的方法 移动所述掩模使得所述至少两个孔与所述第一材料的所述第一部分的一部分重叠，以及将所述第一材料的第二部分暴露于通过所述至少两个孔的辐射。 第一部分和第二部分将以这样的方式重叠，使得第一材料的未暴露部分布置在第一部分和第二部分之间。 然后可以去除第一材料的未曝光或暴露部分。 剩余的第一材料可以用作光致抗蚀剂掩模以在集成电路中形成通孔。 所产生的通孔的图案具有超过单次曝光处理的当前成像分辨率的能力。

公开(公告)号：US08871646B2

公开(公告)日：2014-10-28

申请号：US13947792

申请日：2013-07-22

Applicant: Micron Technology, Inc.

Inventor： Anton DeVilliers

IPC: H01L21/311 ,  H01L27/105 ,  H01L21/3213 ,  H01L21/308 ,  H01L21/768 ,  H01L21/033 ,  H01L21/027 ,  H01L27/10

CPC classification number: H01L21/31144 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/32139 ,  H01L21/76816 ,  H01L27/10 ,  H01L27/1052

Abstract: In some embodiments, methods for forming a masking pattern for an integrated circuit are disclosed. In one embodiment, mandrels defining a first pattern are formed in a first masking layer over a target layer. A second masking layer is deposited to at least partially fill spaces of the first pattern. Sacrificial structures are formed between the mandrels and the second masking layer. After depositing the second masking layer and forming the sacrificial structures, the sacrificial structures are removed to define gaps between the mandrels and the second masking layer, thereby defining a second pattern. The second pattern includes at least parts of the mandrels and intervening mask features alternating with the mandrels. The second pattern may be transferred into the target layer. In some embodiments, the method allows the formation of features having a high density and a small pitch while also allowing the formation of features having various shapes and sizes.

Abstract translation: 在一些实施例中，公开了用于形成用于集成电路的掩模图案的方法。 在一个实施例中，限定第一图案的心轴形成在目标层上的第一掩蔽层中。 沉积第二掩蔽层以至少部分填充第一图案的空间。 在心轴和第二掩模层之间形成牺牲结构。 在沉积第二掩模层并形成牺牲结构之后，去除牺牲结构以限定芯轴和第二掩模层之间的间隙，从而限定第二图案。 第二图案包括心轴的至少一部分和与心轴交替的中间掩模特征。 第二图案可以被转移到目标层中。 在一些实施例中，该方法允许形成具有高密度和小间距的特征，同时还允许形成具有各种形状和尺寸的特征。

公开(公告)号：US20130309871A1

公开(公告)日：2013-11-21

申请号：US13947792

申请日：2013-07-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Anton DeVilliers

IPC: H01L21/311

CPC classification number: H01L21/31144 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/32139 ,  H01L21/76816 ,  H01L27/10 ,  H01L27/1052

Abstract: In some embodiments, methods for forming a masking pattern for an integrated circuit are disclosed. In one embodiment, mandrels defining a first pattern are formed in a first masking layer over a target layer. A second masking layer is deposited to at least partially fill spaces of the first pattern. Sacrificial structures are formed between the mandrels and the second masking layer. After depositing the second masking layer and forming the sacrificial structures, the sacrificial structures are removed to define gaps between the mandrels and the second masking layer, thereby defining a second pattern. The second pattern includes at least parts of the mandrels and intervening mask features alternating with the mandrels. The second pattern may be transferred into the target layer. In some embodiments, the method allows the formation of features having a high density and a small pitch while also allowing the formation of features having various shapes and sizes.

Abstract translation: 在一些实施例中，公开了用于形成用于集成电路的掩模图案的方法。 在一个实施例中，限定第一图案的心轴形成在目标层上的第一掩蔽层中。 沉积第二掩蔽层以至少部分填充第一图案的空间。 在心轴和第二掩模层之间形成牺牲结构。 在沉积第二掩模层并形成牺牲结构之后，去除牺牲结构以限定芯轴和第二掩模层之间的间隙，从而限定第二图案。 第二图案包括心轴的至少一部分和与心轴交替的中间掩模特征。 第二图案可以被转移到目标层中。 在一些实施例中，该方法允许形成具有高密度和小间距的特征，同时还允许形成具有各种形状和尺寸的特征。

公开(公告)号：US20130323924A1

公开(公告)日：2013-12-05

申请号：US13963096

申请日：2013-08-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Anton DeVilliers ,  Michael Hyatt

IPC: G03F7/20 ,  H01L21/768

CPC classification number: G03F7/2022 ,  G03F7/70466 ,  H01L21/76814

Abstract: Methods of forming a pattern in a material and methods of forming openings in a material to be patterned are disclosed, such as a method that includes exposing first portions of a first material to radiation through at least two apertures of a mask arranged over the first material, shifting the mask so that the at least two apertures overlap a portion of the first portions of the first material, and exposing second portions of the first material to radiation through the at least two apertures. The first portions and the second portions will overlap in such a way that non-exposed portions of the first material are arranged between the first portions and second portions. The non-exposed or exposed portions of the first material may then be removed. The remaining first material may be used as a photoresist mask to form vias in an integrated circuit. The pattern of vias produced have the capability to exceed the current imaging resolution of a single exposure treatment.

Abstract translation: 公开了在材料中形成图案的方法和在待图案化的材料中形成开口的方法，例如包括将第一材料的第一部分暴露于通过布置在第一材料上的掩模的至少两个孔的辐射的方法 移动所述掩模使得所述至少两个孔与所述第一材料的所述第一部分的一部分重叠，以及将所述第一材料的第二部分暴露于通过所述至少两个孔的辐射。 第一部分和第二部分将以这样的方式重叠，使得第一材料的未暴露部分布置在第一部分和第二部分之间。 然后可以去除第一材料的未曝光或暴露部分。 剩余的第一材料可以用作光致抗蚀剂掩模以在集成电路中形成通孔。 所产生的通孔的图案具有超过单次曝光处理的当前成像分辨率的能力。