公开(公告)号：US20230187254A1

公开(公告)日：2023-06-15

申请号：US18165119

申请日：2023-02-06

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

CPC classification number: H01L21/6833 ,  H01L21/76251

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US11114328B2

公开(公告)日：2021-09-07

申请号：US16206895

申请日：2018-11-30

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US20170213761A1

公开(公告)日：2017-07-27

申请号：US15481301

申请日：2017-04-06

Applicant: Micron Technology, Inc.

Inventor： Sanh D. Tang ,  Ming Zhang

IPC: H01L21/762 ,  H01L29/861 ,  H01L27/08 ,  H01L21/32

CPC classification number: H01L21/762 ,  H01L21/32 ,  H01L27/0814 ,  H01L27/108 ,  H01L27/10808 ,  H01L27/2454 ,  H01L27/2472 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/861 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144

Abstract: Semiconductor devices including at least one diode over a conductive strap. The semiconductor device may include at least one conductive strap over an insulator material, at least one diode comprising a single crystalline silicon material over a conductive material, and a memory cell on the at least one diode. The at least one diode may be formed from a single crystalline silicon material. Methods of forming such semiconductor devices are also disclosed.

公开(公告)号：US20140179115A1

公开(公告)日：2014-06-26

申请号：US14192410

申请日：2014-02-27

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills ,  Gurtej S. Sandhu ,  John Smythe ,  Ming Zhang

IPC: H01L21/027

CPC classification number: H01L21/0274 ,  G03F7/20 ,  G03F7/40 ,  H01L21/0337 ,  H01L21/0338

Abstract: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.

Abstract translation: 一些实施例包括形成开口图案的方法。 所述方法可以包括在衬底上形成间隔的特征。 特征可以具有顶部并且可以具有从顶部向下延伸的侧壁。 第一材料可以沿着特征的顶部和侧壁形成。 第一材料可以通过将特征上的第一材料的共形层旋转浇铸而形成，或通过相对于基底的特征的选择性沉积来形成。 在形成第一材料之后，可以在特征之间提供填充材料，同时使第一材料的区域暴露。 然后可以相对于填充材料和特征来选择性地去除第一材料的暴露区域以产生开口图案。

公开(公告)号：US10157769B2

公开(公告)日：2018-12-18

申请号：US15481301

申请日：2017-04-06

Applicant: Micron Technology, Inc.

Inventor： Sanh D. Tang ,  Ming Zhang

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/762 ,  H01L27/108 ,  H01L29/66 ,  H01L27/24 ,  H01L21/32 ,  H01L27/08 ,  H01L29/861 ,  H01L29/78 ,  H01L45/00

Abstract: Semiconductor devices including at least one diode over a conductive strap. The semiconductor device may include at least one conductive strap over an insulator material, at least one diode comprising a single crystalline silicon material over a conductive material, and a memory cell on the at least one diode. The at least one diode may be formed from a single crystalline silicon material. Methods of forming such semiconductor devices are also disclosed.

公开(公告)号：US08703396B2

公开(公告)日：2014-04-22

申请号：US13710729

申请日：2012-12-11

Applicant: Micron Technology, Inc.

Inventor： Scott Sllls ,  Gurtej Sandhu ,  John Smythe ,  Ming Zhang

IPC: G03F7/26

CPC classification number: H01L21/0274 ,  G03F7/20 ,  G03F7/40 ,  H01L21/0337 ,  H01L21/0338

Abstract: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.

Abstract translation: 一些实施例包括形成开口图案的方法。 所述方法可以包括在衬底上形成间隔的特征。 特征可以具有顶部并且可以具有从顶部向下延伸的侧壁。 第一材料可以沿着特征的顶部和侧壁形成。 第一材料可以通过将特征上的第一材料的共形层旋转浇铸而形成，或通过相对于基底的特征的选择性沉积来形成。 在形成第一材料之后，可以在特征之间提供填充材料，同时使第一材料的区域暴露。 然后可以相对于填充材料和特征来选择性地去除第一材料的暴露区域以产生开口图案。

公开(公告)号：US20240363384A1

公开(公告)日：2024-10-31

申请号：US18767938

申请日：2024-07-09

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

CPC classification number: H01L21/6833 ,  H01L21/76251

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US12040211B2

公开(公告)日：2024-07-16

申请号：US18165119

申请日：2023-02-06

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

CPC classification number: H01L21/6833 ,  H01L21/76251

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US11574834B2

公开(公告)日：2023-02-07

申请号：US17395389

申请日：2021-08-05

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.

公开(公告)号：US20190096732A1

公开(公告)日：2019-03-28

申请号：US16206895

申请日：2018-11-30

Applicant: Micron Technology, Inc.

Inventor： Shu Qin ,  Ming Zhang

IPC: H01L21/683 ,  H01L21/762

Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for enhancing wafer bonding includes positioning a substrate assembly on a unipolar electrostatic chuck in direct contact with an electrode, electrically coupling a conductor to a second substrate positioned on top of the first substrate, and applying a voltage to the electrode, thereby creating a potential differential between the first substrate and the second substrate that generates an electrostatic force between the first and second substrates.