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    Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
    1.
    发明授权
    Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding 有权

    公开(公告)号：US11216395B2

    公开(公告)日：2022-01-04

    申请号：US16553065

    申请日：2019-08-27

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Timothy Hollis

    IPC: G06F13/16 ,  H04L25/49 ,  G06F13/40 ,  H04L27/02

    Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

    Reference voltage generation for single-ended communication channels
    4.
    发明授权
    Reference voltage generation for single-ended communication channels 有权

    公开(公告)号：US09244477B2

    公开(公告)日：2016-01-26

    申请号：US14059095

    申请日：2013-10-21

    Applicant: Micron Technology, Inc.

    Inventor： Dragos Dimitriu ,  Timothy Hollis

    IPC: G05F3/08 ,  H03K19/0175

    CPC classification number: G05F3/08 ,  H03K19/0175

    Abstract: An improved reference voltage (Vref) generator useable, for example, in sensing data on single-ended channels is disclosed. The Vref generator can be placed on the integrated circuit containing the receivers, or may be placed off chip. In one embodiment, the Vref generator comprises an adjustable-resistance voltage divider in combination with a current source. The voltage divider is referenced to I/O power supplies Vddq and Vssq, with Vref being generated at a node intervening between the adjustable resistances of the voltage divider. The current source injects a current into the Vref node and into a non-varying Thevenin equivalent resistance formed of the same resistors used in the voltage divider. So constructed, the voltage generated equals the sum of two terms: a first term comprising the slope between Vref and Vddq, and a second term comprising a Vref offset. Each of these terms can be independently adjusted in first and second modes: the slope term via the voltage divider, and the offset term by the magnitude of the injected current. Use of the disclosed Vref generator in one useful implementation allows Vref to be optimized at two different values for Vddq.

    Self-calibrating continuous-time equalization
    5.
    发明授权
    Self-calibrating continuous-time equalization 有权
    自校准连续时间均衡

    公开(公告)号：US09014318B2

    公开(公告)日：2015-04-21

    申请号：US13850012

    申请日：2013-03-25

    Applicant: Micron Technology, Inc.

    Inventor： Timothy Hollis

    IPC: H04B1/10 ,  H03H7/30 ,  H04L25/03 ,  H04L27/01

    CPC classification number: H04L27/01 ,  H04L25/03885 ,  H04L2025/03617

    Abstract: Embodiments of the invention comprise a continuous-time equalizer for reducing ISI in data received from a communication channel, and methods and circuitry for tuning or calibrating that equalizer. Selected coefficients for a transfer function of the equalizer circuit are fixed, while other coefficients are tuned by an adaptive algorithm. The adaptive algorithm minimizes errors associated with the tunable coefficients based on one or more training signals sent by the transmitter and received by the equalizer circuit at the receiver. The training signals allow for a variety of error terms to be calculated, from which the tunable coefficients are updated so as to iteratively minimize the error terms and simultaneously tune the equalizer to more accurately compensate for the degrading effects of the channel.

    Abstract translation: 本发明的实施例包括用于减少从通信信道接收的数据中的ISI的连续时间均衡器，以及用于调谐或校准该均衡器的方法和电路。 用于均衡器电路的传递函数的选定系数是固定的，而其他系数由自适应算法调谐。 自适应算法基于由发射机发送并在接收机处由均衡器电路接收的一个或多个训练信号来最小化与可调谐系数相关联的误差。 训练信号允许计算各种误差项，从中可以更新可调系数，以迭代地最小化误差项，同时调谐均衡器以更准确地补偿通道的降级效应。

    Simulating the transmission and simultaneous switching output noise of signals in a computer system
    6.
    发明授权
    Simulating the transmission and simultaneous switching output noise of signals in a computer system 有权
    模拟计算机系统中信号的传输和同时切换输出噪声

    公开(公告)号：US08938376B2

    公开(公告)日：2015-01-20

    申请号：US13959360

    申请日：2013-08-05

    Applicant: Micron Technology, Inc.

    Inventor： Timothy Hollis

    IPC: G06F17/50

    CPC classification number: G06F17/5009 ,  G06F17/5036 ,  G06F2217/10 ,  G06F2217/82

    Abstract: Methods implementable in a computer system for simulating the transmission of signals across a plurality of data channels (bus) are disclosed. The disclosed techniques simulate the effects of Intersymbol Interference (ISI), cross talk, and Simultaneous Switching Output (SSO) noise by generating Probability Distribution Functions (PDFs) for each. The resulting PDFs are convolved to arrive at a total PDF indicative of the reception of data subject to each of these non-idealities. The total PDF, and its underlying terms, can be indexed to particular channels of the bus as well as to particular logic states. Use of the disclosed technique allows bit error rates and sensing margins to be determined with minimal computation and simulation.

    Abstract translation: 公开了在用于模拟跨多个数据信道（总线）上的信号传输的计算机系统中可实现的方法。 所公开的技术通过产生每个的概率分布函数（PDF）来模拟符号间干扰（ISI），串扰和同时切换输出（SSO）噪声的影响。 所得到的PDF被卷积以得到指示接收每个这些非理想性的数据的总的PDF。 总的PDF及其基本术语可以索引到总线的特定通道以及特定的逻辑状态。 使用所公开的技术允许通过最少的计算和模拟来确定误码率和感测裕度。

    SELF-CALIBRATING CONTINUOUS-TIME EQUALIZATION
    7.
    发明申请
    SELF-CALIBRATING CONTINUOUS-TIME EQUALIZATION 有权
    自校准连续均衡

    公开(公告)号：US20130230089A1

    公开(公告)日：2013-09-05

    申请号：US13850012

    申请日：2013-03-25

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Timothy Hollis

    IPC: H04L27/01

    CPC classification number: H04L27/01 ,  H04L25/03885 ,  H04L2025/03617

    Abstract: Embodiments of the invention comprise a continuous-time equalizer for reducing ISI in data received from a communication channel, and methods and circuitry for tuning or calibrating that equalizer. Selected coefficients for a transfer function of the equalizer circuit are fixed, while other coefficients are tuned by an adaptive algorithm. The adaptive algorithm minimizes errors associated with the tunable coefficients based on one or more training signals sent by the transmitter and received by the equalizer circuit at the receiver. The training signals allow for a variety of error terms to be calculated, from which the tunable coefficients are updated so as to iteratively minimize the error terms and simultaneously tune the equalizer to more accurately compensate for the degrading effects of the channel.

    Abstract translation: 本发明的实施例包括用于减少从通信信道接收的数据中的ISI的连续时间均衡器，以及用于调谐或校准该均衡器的方法和电路。 用于均衡器电路的传递函数的选定系数是固定的，而其他系数由自适应算法调谐。 自适应算法基于由发射机发送并在接收机处由均衡器电路接收的一个或多个训练信号来最小化与可调谐系数相关联的误差。 训练信号允许计算各种误差项，从中可以更新可调系数，以迭代地最小化误差项，同时调谐均衡器以更准确地补偿通道的降级效应。

    Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
    10.
    发明授权
    Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding 有权

    公开(公告)号：US11188484B2

    公开(公告)日：2021-11-30

    申请号：US16553065

    申请日：2019-08-27

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Timothy Hollis

    IPC: G06F13/16 ,  H04L25/49 ,  G06F13/40 ,  H04L27/02

    Abstract: Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate.

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