Stabilization of output timing delay
    1.
    发明授权
    Stabilization of output timing delay 有权
    稳定输出定时延时

    公开(公告)号:US09444462B2

    公开(公告)日:2016-09-13

    申请号:US14458936

    申请日:2014-08-13

    CPC classification number: H03K19/018521 H03K19/00384

    Abstract: An integrated circuit includes an output buffer and a control circuit. The output buffer has a signal input, a signal output, and a set of control inputs. The output buffer has an output buffer delay, and a driving strength adjustable in response to control signals applied to the set of control inputs. Alternatively, the output buffer delay is variable. The control circuit is connected to the set of control inputs of the output buffer. The control circuit uses first and second timing signals to generate the control signals, and can include a first delay circuit that generates the first timing signal with a first delay, and a second delay circuit that generates the second timing signal with a second delay that correlates with the output buffer delay.

    Abstract translation: 集成电路包括输出缓冲器和控制电路。 输出缓冲器具有信号输入,信号输出和一组控制输入。 输出缓冲器具有输出缓冲器延迟,并且响应于施加到该组控制输入的控制信号而可调整驱动强度。 或者,输出缓冲器延迟是可变的。 控制电路连接到输出缓冲器的一组控制输入。 控制电路使用第一和第二定时信号来产生控制信号,并且可以包括产生具有第一延迟的第一定时信号的第一延迟电路和产生具有第二延迟的第二定时信号的第二延迟电路, 与输出缓冲区延迟。

    Circuit for voltage detection and protection and operating method thereof
    2.
    发明授权
    Circuit for voltage detection and protection and operating method thereof 有权
    电压检测和保护电路及其操作方法

    公开(公告)号:US09490624B2

    公开(公告)日:2016-11-08

    申请号:US14472520

    申请日:2014-08-29

    CPC classification number: H02H3/202 G11C5/143 H02H3/20 H02H3/22 H02H3/243 H02H7/22

    Abstract: A circuit for voltage detection and protection comprises a first block, a first voltage detector, a second block and a second voltage detector. The first block receives a first voltage supply. The first voltage detector detects the first voltage supply and generates a first detecting signal when detecting the first voltage supply level is out of the first operating voltage range. The second block receives a second voltage supply. The second voltage detector detects the second voltage supply and generates a second detecting signal when detecting the second voltage supply level is out of the second operating voltage range. The first block performs a protection operation on the circuit when monitoring at least one of the first and second detecting signals.

    Abstract translation: 用于电压检测和保护的电路包括第一块,第一电压检测器,第二块和第二电压检测器。 第一块接收第一个电压源。 第一电压检测器检测第一电压源,并且当检测到第一电压供应电平在第一工作电压范围之外时产生第一检测信号。 第二块接收第二电压源。 第二电压检测器检测第二电压源,并且当检测到第二电压供应电平在第二工作电压范围之外时产生第二检测信号。 当监视第一和第二检测信号中的至少一个时,第一块在电路上执行保护操作。

    Self-calibration of output buffer driving strength

    公开(公告)号:US08847635B2

    公开(公告)日:2014-09-30

    申请号:US14158033

    申请日:2014-01-17

    CPC classification number: H03K17/145 H03K19/00384 H03K2005/00026

    Abstract: An integrated circuit includes an output buffer and a control circuit. The output buffer has a signal input, a signal output, and a set of control inputs. The output buffer has an output buffer delay, and a driving strength adjustable in response to control signals applied to the set of control inputs. The control circuit is connected to the set of control inputs of the output buffer. The control circuit uses first and second timing signals to generate the control signals, and includes a reference delay circuit that generates the first timing signal with a reference delay, and a delay emulation circuit that generates the second timing signal with an emulation delay that correlates with the output buffer delay.

    CIRCUIT FOR VOLTAGE DETECTION AND PROTECTION AND OPERATING METHOD THEREOF
    4.
    发明申请
    CIRCUIT FOR VOLTAGE DETECTION AND PROTECTION AND OPERATING METHOD THEREOF 有权
    用于电压检测和保护的电路及其操作方法

    公开(公告)号:US20160064921A1

    公开(公告)日:2016-03-03

    申请号:US14472520

    申请日:2014-08-29

    CPC classification number: H02H3/202 G11C5/143 H02H3/20 H02H3/22 H02H3/243 H02H7/22

    Abstract: A circuit for voltage detection and protection comprises a first block, a first voltage detector, a second block and a second voltage detector. The first block receives a first voltage supply. The first voltage detector detects the first voltage supply and generates a first detecting signal when detecting the first voltage supply level is out of the first operating voltage range. The second block receives a second voltage supply. The second voltage detector detects the second voltage supply and generates a second detecting signal when detecting the second voltage supply level is out of the second operating voltage range. The first block performs a protection operation on the circuit when monitoring at least one of the first and second detecting signals.

    Abstract translation: 用于电压检测和保护的电路包括第一块,第一电压检测器,第二块和第二电压检测器。 第一块接收第一个电压源。 第一电压检测器检测第一电压源,并且当检测到第一电压供应电平在第一工作电压范围之外时产生第一检测信号。 第二块接收第二电压源。 第二电压检测器检测第二电压源,并且当检测到第二电压供应电平在第二工作电压范围之外时产生第二检测信号。 当监视第一和第二检测信号中的至少一个时,第一块在电路上执行保护操作。

    STABILIZATION OF OUTPUT TIMING DELAY
    5.
    发明申请
    STABILIZATION OF OUTPUT TIMING DELAY 有权
    输出时序延迟稳定

    公开(公告)号:US20160049925A1

    公开(公告)日:2016-02-18

    申请号:US14458936

    申请日:2014-08-13

    CPC classification number: H03K19/018521 H03K19/00384

    Abstract: An integrated circuit includes an output buffer and a control circuit. The output buffer has a signal input, a signal output, and a set of control inputs. The output buffer has an output buffer delay, and a driving strength adjustable in response to control signals applied to the set of control inputs. Alternatively, the output buffer delay is variable. The control circuit is connected to the set of control inputs of the output buffer. The control circuit uses first and second timing signals to generate the control signals, and can include a first delay circuit that generates the first timing signal with a first delay, and a second delay circuit that generates the second timing signal with a second delay that correlates with the output buffer delay.

    Abstract translation: 集成电路包括输出缓冲器和控制电路。 输出缓冲器具有信号输入,信号输出和一组控制输入。 输出缓冲器具有输出缓冲器延迟,并且响应于施加到该组控制输入的控制信号而可调整驱动强度。 或者,输出缓冲器延迟是可变的。 控制电路连接到输出缓冲器的一组控制输入。 控制电路使用第一和第二定时信号来产生控制信号,并且可以包括产生具有第一延迟的第一定时信号的第一延迟电路和产生具有第二延迟的第二定时信号的第二延迟电路, 与输出缓冲区延迟。

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