公开(公告)号：US20130075819A1

公开(公告)日：2013-03-28

申请号：US13640481

申请日：2012-01-16

申请人： Manabu Takei ,  Yusuke Kobayashi

发明人： Manabu Takei ,  Yusuke Kobayashi

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L29/78 ,  H01L21/02107 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/404 ,  H01L29/66348 ,  H01L29/7395

摘要： A semiconductor device includes an active section for a main current flow and a breakdown withstanding section for breakdown voltage. An external peripheral portion surrounds the active section on one major surface of an n-type semiconductor substrate. The breakdown withstanding section has a ring-shaped semiconductor protrusion, with a rectangular planar pattern including a curved section in each of four corners thereof, as a guard ring. The ring-shaped semiconductor protrusion has a p-type region therein, is sandwiched between a plurality of concavities deeper than the p-type region, and has an electrically conductive film across an insulator film on the surface thereof. Because of this, it is possible to manufacture at low cost a breakdown withstanding structure with which a high breakdown voltage is obtained in a narrow width, wherein there is little drop in breakdown voltage, even when there are variations in a patterning process of a field oxide film.

摘要翻译： 半导体器件包括用于主电流的有源部分和击穿电压的击穿部分。 外周边部围绕n型半导体衬底的一个主表面上的有源部分。 击穿承受部具有环形半导体突起，其具有在其四个角中的每一个中包括弯曲部分的矩形平面图案作为保护环。 该环状半导体突起在其中具有p型区域，夹在比p型区域更深的多个凹部之间，并且在其表面上具有跨绝缘膜的导电膜。 因此，可以以低成本制造在窄宽度下获得高击穿电压的击穿耐受结构，即使在场的图案化处理存在变化的情况下，击穿电压几乎没有下降 氧化膜。

公开(公告)号：US08269760B2

公开(公告)日：2012-09-18

申请号：US12626747

申请日：2009-11-27

申请人： Jun Ogura ,  Manabu Takei ,  Shunji Kashiyama

发明人： Jun Ogura ,  Manabu Takei ,  Shunji Kashiyama

IPC分类号： G06F3/038

CPC分类号： G09G3/3291 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2320/04

摘要： A pixel driving device has a voltage impressing circuit that outputs a reference voltage that exceeds a threshold voltage of a drive transistor, a voltage measurement circuit, and a property parameter acquisition circuit that acquires a property parameter related to an electronic property of a pixel. The pixel driving device impresses the reference voltage on the pixel that has a light emitting element and the drive transistor. The voltage measurement circuit acquires voltage of a signal line, as measured voltages, after each of a plurality of the settling times elapsing from the time when the reference voltage is cut. The property parameter acquisition circuit acquires, as property parameters, the threshold voltage and a current amplification factor of drive transistor based on values of a plurality of measured voltages acquired by the voltage measurement circuit.

摘要翻译： 像素驱动装置具有输出超过驱动晶体管的阈值电压的参考电压的电压施加电路，电压测量电路和获取与像素的电子特性相关的特性参数的属性参数获取电路。 像素驱动装置对具有发光元件的像素和驱动晶体管施加参考电压。 在从基准电压切断时起经过的多个稳定时间的每一个之后，电压测量电路获取作为测量电压的信号线的电压。 属性参数获取电路基于由电压测量电路获取的多个测量电压的值作为特性参数获取驱动晶体管的阈值电压和电流放大系数。

公开(公告)号：US08269759B2

公开(公告)日：2012-09-18

申请号：US12626731

申请日：2009-11-27

申请人： Jun Ogura ,  Manabu Takei ,  Shunji Kashiyama

发明人： Jun Ogura ,  Manabu Takei ,  Shunji Kashiyama

IPC分类号： G06F3/038

CPC分类号： G09G3/3291 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2320/043

摘要： A pixel driving device in which, after a reference voltage exceeds a threshold voltage of a drive transistor is impressed through the signal lines on each pixel equipping a light emitting element and the drive transistor, set the signal lines in a state of high impedance, and acquires a voltage value of one end of the signal lines subsequent to a predetermined settling time elapsing, and acquires the threshold voltage of the drive transistor for each pixel and the current amplification factor of the pixel drive circuit as a first property parameter based on acquired voltage values at the time a plurality of first settling times longer than a predetermined value and acquires an irregularity parameter indicating the irregularity in the current amplification factor based on the value of the first property parameter and the measured voltage value acquired at the time shorter than the predetermined value.

摘要翻译： 一种像素驱动装置，其中，在参考电压超过驱动晶体管的阈值电压的情况下，通过装配发光元件和驱动晶体管的每个像素上的信号线施加脉冲，将信号线设置为高阻抗状态，以及 获取在经过预定的建立时间之后的信号线的一端的电压值，并且基于获取的电压获取每个像素的驱动晶体管的阈值电压和像素驱动电路的当前放大系数作为第一属性参数 在多个第一建立时间比预定值多的时间值，并且基于第一属性参数的值和在比预定时间短的时间获取的测量电压值来获取指示当前放大因子的不规则性的不规则参数 值。

公开(公告)号：US07790519B2

公开(公告)日：2010-09-07

申请号：US11754751

申请日：2007-05-29

申请人： Setsuko Wakimoto ,  Manabu Takei ,  Shinji Fujikake

发明人： Setsuko Wakimoto ,  Manabu Takei ,  Shinji Fujikake

IPC分类号： H01L21/332

CPC分类号： H01L29/1095 ,  H01L29/0653 ,  H01L29/42324 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397

摘要： A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate electrode, a buffer region of one conductivity type in contact with the semiconductor substrate, a base region of the other conductivity type adjacent to the buffer region on the gate insulator film, and an emitter region of the one conductivity type adjacent to the base region on the side opposite to the buffer region. The semiconductor device and the method of manufacturing thereof can further improve the tradeoff between the on-voltage and the turn-off loss by increasing the amount of electrons injected from a cathode on the surface to increase an amount of carriers on the cathode side in a stable turned-on state of the device.

摘要翻译： 半导体器件具有MOS栅极侧表面结构，其包括填充形成在半导体衬底中的沟槽的栅电极，其中沟槽和栅电极之间具有绝缘膜，覆盖栅电极表面的栅极绝缘膜，缓冲区 与半导体衬底接触的一种导电类型，与栅极绝缘体膜上的缓冲区相邻的另一导电类型的基极区域和与该半导体衬底的相反侧的基极区域相邻的一种导电类型的发射极区域 缓冲区。 半导体器件及其制造方法可以通过增加从表面上的阴极注入的电子量来进一步提高导通电压和关断损耗之间的权衡，以增加阴极侧的载流子的量 稳定的开机状态。

公开(公告)号：US20100134482A1

公开(公告)日：2010-06-03

申请号：US12626756

申请日：2009-11-27

申请人： JUN OGURA ,  Manabu Takei ,  Shunji Kashiyama

发明人： JUN OGURA ,  Manabu Takei ,  Shunji Kashiyama

IPC分类号： G09G5/00 ,  G09G3/30

CPC分类号： G09G3/3291 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2320/0276 ,  G09G2320/043

摘要： A pixel driving device for drive control of pixels, has a image data conversion circuit for generating an original gradation signal by converting an image data, based on a preset conversion property, a signal correction circuit for outputting a corrected gradation signal by adding a correction value acquired based on an electric property parameter of a pixel to the original gradation signal, and a drive signal impressing circuit for impressing a voltage signal corresponding to the corrected gradation signal on one end of a signal line. The original gradation signal has a value that corresponds to a gradation value of the image data and the maximum value of the original gradation signal is set to a value equal to or smaller than a value acquired by subtracting a value corresponding to the correction value from a maximum value in an input range of the drive signal impressing circuit.

摘要翻译： 一种用于像素驱动控制的像素驱动装置，具有图像数据转换电路，用于通过基于预设的转换特性转换图像数据来生成原始灰度信号，该信号校正电路用于通过将校正灰度信号的校正值 基于与原始灰度信号的像素的电特性参数获取的驱动信号施加电路，用于在信号线的一端上施加与校正的灰度信号相对应的电压信号。 原始灰度信号具有对应于图像数据的灰度值的值，并且原始灰度信号的最大值被设置为等于或小于通过从a中减去与校正值相对应的值而获得的值 在驱动信号施加电路的输入范围内的最大值。

公开(公告)号：US20100079423A1

公开(公告)日：2010-04-01

申请号：US12569322

申请日：2009-09-29

申请人： Manabu Takei ,  Jun Ogura ,  Shunji Kashiyama ,  Tsuyoshi Ozaki

发明人： Manabu Takei ,  Jun Ogura ,  Shunji Kashiyama ,  Tsuyoshi Ozaki

IPC分类号： G09G5/00 ,  G09G3/30

CPC分类号： G09G3/3233 ,  G09G3/30 ,  G09G3/3291 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/043

摘要： A data acquisition circuit sets one of the potential value at one end of a signal line and the value of a current flown thereto when one end of a current path of a drive device is connected to a light emitting device with the other end thereof set to a potential value where no current flows to the light emitting device. Then the circuit causes current to flow via the current path and the signal line and acquires one of the value of the current flown to the signal line and the potential value at the one end of the signal line according to the set value. A correction operation circuit acquires a threshold voltage and a current amplification factor of the drive device based on one of the current and potential values thus acquired as well as on one of the potential and current values thus set.

摘要翻译： 数据采集​​电路将驱动装置的电流路径的一端连接到发光装置的另一端设定为信号线的一端的电位值中的一方和流过的电流值 没有电流流向发光器件的电位值。 然后，电路使电流通过电流路径和信号线流动，并根据设定值获取流向信号线的电流值和信号线一端的电位值之一。 校正操作电路基于如此获取的电流和电位值之一以及由此设置的电势值和电流值之一获取驱动装置的阈值电压和电流放大系数。

公开(公告)号：US20080290805A1

公开(公告)日：2008-11-27

申请号：US12035359

申请日：2008-02-21

申请人： Hiroyasu YAMADA ,  Manabu Takei

发明人： Hiroyasu YAMADA ,  Manabu Takei

IPC分类号： G09G3/00 ,  G06F3/038 ,  G09G3/20

CPC分类号： G09G3/325 ,  G09G2300/0417 ,  G09G2300/0819 ,  G09G2300/0847 ,  G09G2300/0852 ,  G09G2300/0866 ,  G09G2310/027 ,  G09G2320/0223 ,  G09G2320/043

摘要： A display panel (110) includes a plurality of optical elements (OEL) each having a pair of electrodes and performing an optical operation according to current passing between the pair of electrodes, a current line (DL), a switch circuit (Tr2) that passes a write current (Ia) with a predetermined current value through the current line (DL) during a selection time (Tse) and stops passing current during a non-selection time (Tnse), and a current storage circuit (Tr1, Tr3, Cs, Cp) that stores current data according to the current value of the write current (Ia) passing through the current line (DL) during the selection time (Tse) and that supplies a drive current (Ib) having a current value, which is obtained by subtracting a predetermined offset current (Ioff) from the current value of the stored write current (Ia), to the optical elements (OEL) during the non-selection time (Tnse).

摘要翻译： 显示面板（110）包括多个光学元件（OEL），每个光学元件具有一对电极，并且根据在一对电极之间的电流进行光学操作，电流线（DL），开关电路（Tr2） 在选择时间（Tse）期间通过当前行（DL）通过具有预定电流值的写入电流（Ia），并且在非选择时间（Tnse）期间停止通过电流，并且当前存储电路（Tr1，Tr3， Cs，Cp），其根据在选择时间（Tse）期间通过当前行（DL）的写入电流（Ia）的当前值来存储当前数据，并且提供具有当前值的驱动电流（Ib），其中 通过从存储的写入电流（Ia）的当前值中减去预定偏移电流（Ioff）到​​非选择时间（Tnse）期间的光学元件（OEL）而获得。

公开(公告)号：US20070224769A1

公开(公告)日：2007-09-27

申请号：US11754751

申请日：2007-05-29

申请人： Setsuko Wakimoto ,  Manabu Takei ,  Shinji Fujikake

发明人： Setsuko Wakimoto ,  Manabu Takei ,  Shinji Fujikake

IPC分类号： H01L21/331

CPC分类号： H01L29/1095 ,  H01L29/0653 ,  H01L29/42324 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397

摘要： A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate electrode, a buffer region of one conductivity type in contact with the semiconductor substrate, a base region of the other conductivity type adjacent to the buffer region on the gate insulator film, and an emitter region of the one conductivity type adjacent to the base region on the side opposite to the buffer region. The semiconductor device and the method of manufacturing thereof can further improve the tradeoff between the on-voltage and the turn-off loss by increasing the amount of electrons injected from a cathode on the surface to increase an amount of carriers on the cathode side in a stable turned-on state of the device.

摘要翻译： 半导体器件具有MOS栅极侧表面结构，其包括填充形成在半导体衬底中的沟槽的栅电极，其中沟槽和栅电极之间具有绝缘膜，覆盖栅电极表面的栅极绝缘膜，缓冲区 与半导体衬底接触的一种导电类型，与栅极绝缘体膜上的缓冲区相邻的另一导电类型的基极区域和与该半导体衬底的相反侧的基极区域相邻的一种导电类型的发射极区域 缓冲区。 半导体器件及其制造方法可以通过增加从表面上的阴极注入的电子量来进一步提高导通电压和关断损耗之间的权衡，以增加阴极侧的载流子的量 稳定的开机状态。

公开(公告)号：US20060249797A1

公开(公告)日：2006-11-09

申请号：US11389495

申请日：2006-03-27

申请人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

发明人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

IPC分类号： H01L29/732 ,  H01L21/8249

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 该方法包括在导电型半导体衬底的主表面中形成具有V形或梯形形状的横截面的沟槽。 将另一导电型半导体衬底引入到沟槽的侧壁中。 通过激光照射激活基板，其中沟槽的侧壁形成相对于主表面具有七十度或更小的倾斜角。 对于包括衬底的半导体器件也包括独立权利要求。

公开(公告)号：US06762097B2

公开(公告)日：2004-07-13

申请号：US10461065

申请日：2003-06-13

申请人： Manabu Takei ,  Tatsuhiko Fujihira

发明人： Manabu Takei ,  Tatsuhiko Fujihira

IPC分类号： H01L21336

CPC分类号： H01L29/66712 ,  H01L21/263 ,  H01L29/32 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

摘要： A semiconductor device is provided which can be manufactured even by using an inexpensive FZ wafer in a wafer process and still has a sharp inclination of a high impurity concentration in a high impurity concentration layer at the outermost portion of the reverse side and at the boundary between the high impurity concentration and a low impurity concentration drift layer, thus achieving both low cost and a high performance. A method for manufacturing a semiconductor device is also provided which can form a high impurity concentration buffer layer and a high impurity concentration layer at the outermost portion of the reverse side without any significant trouble, even after the formation of an active region and an electrode thereof at the right side, to thereby achieve both low cost and high performance.