Frequency Synthesis Using a Ring Oscillator
    1.
    发明申请
    Frequency Synthesis Using a Ring Oscillator 有权
    使用环形振荡器进行频率合成

    公开(公告)号:US20130113573A1

    公开(公告)日:2013-05-09

    申请号:US13436564

    申请日:2012-03-30

    IPC分类号: H03L7/00 H03K3/03

    CPC分类号: H03L7/099 H03K3/0315

    摘要: The present disclosure is directed to a method and apparatus for providing an output oscillating signal at a desired frequency. In at least one example, the apparatus includes a weak inversion structure configured to set a small reference current. A current mirror configured to provide a replica current based on the small reference current and a tuning word. A ring oscillator is configured to be powered by a supply at a voltage determined based on the replica current. The tuning word is adjustable to change the voltage such that the ring oscillator provides the output oscillating signal at the desired frequency.

    摘要翻译: 本公开涉及一种用于以期望的频率提供输出振荡信号的方法和装置。 在至少一个示例中,该装置包括被配置为设置小参考电流的弱反转结构。 配置为基于小参考电流提供复制电流的电流镜和调谐字。 环形振荡器被配置为由基于复制电流确定的电压的电源供电。 调谐字可调,以改变电压,使得环形振荡器以期望的频率提供输出振荡信号。

    Frequency synthesis using a ring oscillator
    2.
    发明授权
    Frequency synthesis using a ring oscillator 有权
    使用环形振荡器进行频率合成

    公开(公告)号:US08742856B2

    公开(公告)日:2014-06-03

    申请号:US13436564

    申请日:2012-03-30

    IPC分类号: H03K3/03

    CPC分类号: H03L7/099 H03K3/0315

    摘要: The present disclosure is directed to a method and apparatus for providing an output oscillating signal at a desired frequency. In at least one example, the apparatus includes a weak inversion structure configured to set a small reference current. A current mirror configured to provide a replica current based on the small reference current and a tuning word. A ring oscillator is configured to be powered by a supply at a voltage determined based on the replica current. The tuning word is adjustable to change the voltage such that the ring oscillator provides the output oscillating signal at the desired frequency.

    摘要翻译: 本公开涉及一种用于以期望的频率提供输出振荡信号的方法和装置。 在至少一个示例中,该装置包括被配置为设置小参考电流的弱反转结构。 配置为基于小参考电流提供复制电流的电流镜和调谐字。 环形振荡器被配置为由基于复制电流确定的电压的电源供电。 调谐字可调,以改变电压,使得环形振荡器以期望的频率提供输出振荡信号。

    Digital phase-locked loop with wide capture range, low phase noise, and reduced spurs
    3.
    发明授权
    Digital phase-locked loop with wide capture range, low phase noise, and reduced spurs 失效
    数字锁相环具有宽捕捉范围,低相位噪声和减少杂散

    公开(公告)号:US08686771B2

    公开(公告)日:2014-04-01

    申请号:US13485413

    申请日:2012-05-31

    IPC分类号: H03L7/06

    摘要: The present disclosure is directed to digital phase-locked loops (DPLLs) and hybrid phase-locked loops (HPLL) for establishing and maintaining a phase relationship between a generated output signal and a reference input signal. The DPLLs use a counter based loop to initially bring the DPLL into lock. Thereafter, the DPLLs disable the counter based loop and switch to a loop with a multi-modulus divider (MMD). The DPLLs can implement a cancellation technique to reduce phase noise introduced by the MMD. The HPLLs further include a loop with a MMD. The HPLLs can implement a similar cancellation technique to reduce phase noise introduced by the MMD.

    摘要翻译: 本公开涉及用于建立和维持所生成的输出信号和参考输入信号之间的相位关系的数字锁相环(DPLL)和混合锁相环(HPLL)。 DPLL使用基于计数器的循环来初始将DPLL锁定。 此后,DPLL禁用基于计数器的循环并切换到具有多模式分频器(MMD)的回路。 DPLL可以实现消除技术,以减少由MMD引入的相位噪声。 HPLL还包括一个带有MMD的循环。 HPLL可以实现类似的消除技术,以减少由MMD引入的相位噪声。

    Method and apparatus for I/Q imbalance compensation
    6.
    发明授权
    Method and apparatus for I/Q imbalance compensation 有权
    用于I / Q不平衡补偿的方法和装置

    公开(公告)号:US07830954B2

    公开(公告)日:2010-11-09

    申请号:US11452824

    申请日:2006-06-14

    IPC分类号: H04B1/38 H04B17/00 H03D3/00

    CPC分类号: H04B1/30 H03D3/009

    摘要: Various embodiments are disclosed relating to a wireless transceiver. In an example embodiment, a method of compensating for phase imbalance and amplitude imbalance between corresponding in-phase signals and quadrature-phase signals includes providing a plurality of test tones of various frequencies to a receiver and determining, for each of the test tones, a respective phase imbalance and a respective amplitude imbalance between an in-phase (I) signal and a quadrature-phase (Q) signal of the test tone. The example method also includes determining a set of filter coefficients based on the determined phase and amplitude imbalances of the plurality of test tones and applying the set of filter coefficients to a plurality of filters. In the example method, a phase imbalance between an I signal and a Q signal of a received wireless signal is compensated for using a first filter of the plurality of filters. Further, an amplitude imbalance between the I and Q signals of the received wireless signal is compensated for using a second filter of the plurality of filters.

    摘要翻译: 公开了关于无线收发器的各种实施例。 在示例性实施例中,补偿相应同步信号和正交相位信号之间的相位不平衡和幅度不平衡的方法包括向接收机提供各种频率的多个测试音调并且为每个测试音调确定一个 相位不平衡和测试音的同相(I)信号和正交相位(Q)信号之间的相应振幅不平衡。 该示例性方法还包括基于所确定的多个测试音调的相位和幅度不平衡以及将该组滤波器系数应用于多个滤波器来确定一组滤波器系数。 在示例性方法中,使用多个滤波器的第一滤波器来补偿接收到的无线信号的I信号和Q信号之间的相位不平衡。 此外,使用多个滤波器的第二滤波器来补偿所接收的无线信号的I信号和Q信号之间的幅度不平衡。

    Wireless transceiver with modulation path delay calibration
    7.
    发明申请
    Wireless transceiver with modulation path delay calibration 审中-公开
    无线收发器具有调制路径延迟校准

    公开(公告)号:US20070165708A1

    公开(公告)日:2007-07-19

    申请号:US11333729

    申请日:2006-01-17

    IPC分类号: H04B1/38 H04L27/04 H04L27/12

    摘要: Various embodiments are disclosed relating to wireless systems, and relating to wireless transceivers. In an example embodiment, the wireless transceiver may include a voltage controlled oscillator (VCO) that may be controlled by a phase-locked loop (PLL). A fractional-N divider may be coupled to a feedback loop of the PLL and a delta-sigma modulator may control the fractional-N divider to vary the divider number of the fractional-N divider to cause the VCO to output a modulated frequency spectrum. In another embodiment, modulation path calibration may be performed by inputting an amplitude and phase modulated transmit spectrum to the transceiver's receiver to be demodulated. The demodulated transmit spectrum may then be analyzed to determine if the transmit spectrum meets one or more signal requirements, such as falling within a required spectral mask. The AM path delay and/or the PM path delay of the transmitter may be adjusted to decrease a mismatch in timing or delay between the AM and PM paths.

    摘要翻译: 公开了与无线系统有关并涉及无线收发器的各种实施例。 在示例实施例中,无线收发器可以包括可由锁相环(PLL)控制的压控振荡器(VCO)。 分数N分频器可以耦合到PLL的反馈环路,并且Δ-Σ调制器可以控制分数N分频器来改变分数N分频器的分频器数,以使VCO输出调制的频谱。 在另一个实施例中,调制路径校准可以通过将幅度和相位调制的发送频谱输入到收发器的接收机进行解调。 然后可以分析解调的发射频谱,以确定发射频谱是否满足一个或多个信号要求,例如落入所需频谱掩模内。 可以调整发射机的AM路径延迟和/或PM路径延迟以减少AM和PM路径之间的定时或延迟的不匹配。

    Frequency synthesizer with improved spurious performance
    8.
    发明申请
    Frequency synthesizer with improved spurious performance 有权
    具有改善杂散性能的频率合成器

    公开(公告)号:US20070075787A1

    公开(公告)日:2007-04-05

    申请号:US11242432

    申请日:2005-09-30

    申请人: Henrik Jensen

    发明人: Henrik Jensen

    IPC分类号: H03L7/00

    摘要: A loop filter for use in a frequency synthesizer provides improved spurious performance using switched capacitors. The loop filter includes a first switched capacitor having a first capacitance value and which is operable to charge to a first voltage corresponding to a current pulse indicative of a difference in phase or frequency between a reference signal and a feedback signal. The loop filter further includes a second switched capacitor having a second capacitance value and which is operable to charge to a second voltage from the first voltage and produce a control voltage based upon the second voltage. The loop filter has a bandwidth determined by a ratio of the second capacitance value to the first capacitance value.

    摘要翻译: 用于频率合成器的环路滤波器使用开关电容器提供改进的杂散性能。 环路滤波器包括具有第一电容值的第一开关电容器,其可操作以对与指示参考信号和反馈信号之间的相位或频率差异的电流脉冲相对应的第一电压充电。 环路滤波器还包括具有第二电容值的第二开关电容器,其可操作以从第一电压充电到第二电压,并且基于第二电压产生控制电压。 环路滤波器具有由第二电容值与第一电容值的比率确定的带宽。

    Multi-mode wireless polar transmitter architecture
    9.
    发明申请
    Multi-mode wireless polar transmitter architecture 有权
    多模无线极性发射机架构

    公开(公告)号:US20060209986A1

    公开(公告)日:2006-09-21

    申请号:US11019338

    申请日:2004-12-21

    IPC分类号: H04L27/12

    摘要: A radio transmitter within a transceiver includes a digital processor and analog circuitry for modulating and transmitting an outgoing digital signal in multiple modes of operation. The digital processor digitally modulates the outgoing digital signal to produce one of a constant envelope modulated digital signal and a variable envelope modulated digital signal based on the particular modulation scheme being used to modulate the outgoing digital signal. In addition, the digital processor filters the outgoing digital signal using filter values selected based on the signal bandwidth of the outgoing digital signal. The analog circuitry converts digital envelope and phase signals of the modulated digital signal to analog envelope and phase signals, and up-converts the analog phase signal from an IF signal to an RF signal, using a loop filter that is programmable based on the signal bandwidth of the outgoing digital signal.

    摘要翻译: 收发器内的无线电发射机包括数字处理器和模拟电路,用于在多种操作模式下调制和发送输出数字信号。 数字处理器基于用于调制输出数字信号的特定调制方案对输出数字信号进行数字调制以产生恒定包络调制数字信号和可变包络调制数字信号之一。 此外,数字处理器使用基于输出数字信号的信号带宽选择的滤波器值对输出的数字信号进行滤波。 模拟电路将调制数字信号的数字包络和相位信号转换为模拟包络和相位信号,并使用基于信号带宽可编程的环路滤波器将模拟相位信号从IF信号上变频到RF信号 的输出数字信号。

    Loop filter with gear shift for improved fractional-N PLL settling time
    10.
    发明申请
    Loop filter with gear shift for improved fractional-N PLL settling time 失效
    带有换档的环路滤波器,用于改进分数N PLL稳定时间

    公开(公告)号:US20060135105A1

    公开(公告)日:2006-06-22

    申请号:US11015101

    申请日:2004-12-17

    申请人: Henrik Jensen

    发明人: Henrik Jensen

    IPC分类号: H04Q7/20

    摘要: An integrated circuit radio frequency (RF) transmitter includes a phase locked loop having a multi-mode loop filter that is operable to provide wide band response with a fast settle time in a startup mode of operation and a relatively more narrow response with a longer settle time but with improved filtering in a steady state mode of operation according to one embodiment of the invention. The multi-mode loop filter includes, in one embodiment, selectable resistance circuitry for selecting between a plurality of resistance values based upon a two-state multi-mode control signal to provide the selected resistance values and selectable capacitance circuitry for selecting between a plurality of capacitance values based upon the two-state multi-mode control signal and for operatively coupling selected capacitors to selected resistors to provide the selected capacitance values. As a further aspect of the embodiment of the present invention, the multi-mode loop filter includes buffers for charging non-selected capacitors while not operationally coupled to the multi-mode loop filter to avoid additional settle time for the circuitry.

    摘要翻译: 集成电路射频(RF)发射机包括具有多模式环路滤波器的锁相环,该多模环路滤波器可操作以在启动操作模式下提供具有快速稳定时间的宽频带响应,并且具有较长的稳定度的相对较窄的响应 时间,但是根据本发明的一个实施例,在稳态操作模式下具有改进的滤波。 在一个实施例中,多模式环路滤波器包括可选择的电阻电路,用于基于两状态多模式控制信号在多个电阻值之间进行选择以提供所选择的电阻值,以及可选择的电容电路,用于在多个 基于双态多模式控制信号的电容值,并且用于将所选择的电容器可操作地耦合到所选择的电阻器以提供所选择的电容值。 作为本发明的实施例的另一方面,多模式环路滤波器包括用于对未选择的电容器进行充电的缓冲器,而不可操作地耦合到多模式环路滤波器以避免电路的额外的稳定时间。