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公开(公告)号：US06417084B1
公开(公告)日：2002-07-09
申请号：US09620300
申请日：2000-07-20
IPC分类号： H01L213205
CPC分类号： H01L21/28114 , H01L21/32139
摘要： A method is provided for fabricating a T-gate structure. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer, and an ARC layer over the polysilicon layer. A gate structure is formed by removing the ARC layer and a portion of the polysilicon layer around a gate region. Spacers are then formed around the gate structure. Undercut regions are formed in the gate structure by performing an isotropic etch to provide the gate structure with a base region and a contact region. The base region has a width smaller than the contact region.
摘要翻译： 提供了一种用于制造T型栅结构的方法。 提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层以及多晶硅层上的ARC层。 通过在栅极区域周围除去ARC层和多晶硅层的一部分来形成栅极结构。 然后在栅极结构周围形成间隔物。 通过执行各向同性蚀刻在栅极结构中形成底切区域，以向栅极结构提供基极区域和接触区域。 基部区域的宽度小于接触区域。
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2.发明授权公开(公告)号：US06319802B1
公开(公告)日：2001-11-20
申请号：US09620145
申请日：2000-07-20
IPC分类号： H01L213205
CPC分类号： H01L21/28114
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a protection layer over the gate oxide layer and a sacrificial layer over the protection layer. An opening is then formed in the sacrificial layer. A contact material is deposited over the sacrificial layer filling the opening with the contact material and forming a contact layer. Portions of the contact material outside a gate region are then removed. Finally, the sacrificial layer and portions of the protection layer and the gate oxide layer not forming a part of the T-gate structure are removed.
摘要翻译： 提供了一种制造T型栅结构的方法。 提供了一种具有硅层的结构，该硅层具有栅极氧化物层，栅极氧化物层上的保护层和保护层上的牺牲层。 然后在牺牲层中形成开口。 接触材料沉积在用接触材料填充开口的牺牲层上并形成接触层。 然后去除栅极区域外部的接触材料的部分。 最后，除去牺牲层和不形成T栅结构的一部分的保护层和栅极氧化物层的部分。
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公开(公告)号：US06255202B1
公开(公告)日：2001-07-03
申请号：US09619836
申请日：2000-07-20
IPC分类号： H01L213205
CPC分类号： H01L29/66583 , H01L21/28114 , H01L21/28123 , H01L21/76807 , H01L29/4238 , H01L29/4925
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. An opening is formed extending partially into the insulating layer. The opening in the insulating layer extends from a top surface of the insulating layer to a first depth. Spacers are then formed on the sides of the opening. The opening is then extended in the insulating layer from the first depth to a second depth. The opening is wider from the top surface of the insulating layer to the first depth than the opening is from the first depth to the second depth. The spacers are then removed from the opening. The opening is then filled with a conductive material to form a T-gate structure.
摘要翻译： 提供了一种制造T型栅结构的方法。 提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层和栅极氧化物层上的绝缘层。 形成部分地延伸到绝缘层中的开口。 绝缘层中的开口从绝缘层的顶表面延伸到第一深度。 然后在开口的两侧形成隔板。 然后将开口在绝缘层中从第一深度延伸到第二深度。 开口从绝缘层的顶表面到比第一深度从第一深度到第二深度的第一深度更宽。 然后将隔离物从开口中取出。 然后用导电材料填充开口以形成T形栅结构。
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公开(公告)号：US06403456B1
公开(公告)日：2002-06-11
申请号：US09643611
申请日：2000-08-22
IPC分类号： H01L2128
CPC分类号： H01L29/42376 , H01L21/28114 , H01L21/28123 , H01L21/76802
摘要： A method for fabricating a T-gate structure is provided. The method comprises the steps of providing a silicon layer having a gate oxide layer, a protection layer over the gate oxide layer, a first sacrificial layer over the protection layer and a second sacrificial layer over the first sacrificial layer. A photoresist layer is formed over the second sacrificial layer. An opening is formed in the photoresist layer. An opening is then formed in the second sacrificial layer beneath the opening in the photoresist layer. The opening is then expanded in the photoresist layer to expose portions of the top surface of the second sacrificial layer around the opening in the second sacrificial layer. The opening is extended in the second sacrificial layer through the first sacrificial layer and the opening is expanded in the second sacrificial layer to form a T-shaped opening in the first and second sacrificial layers. The photoresist layer is removed and the T-shaped opening is filled with a conductive material.
摘要翻译： 提供了一种制造T型栅结构的方法。 该方法包括以下步骤：提供具有栅极氧化物层的硅层，栅极氧化物层上的保护层，保护层上的第一牺牲层和第一牺牲层上的第二牺牲层。 在第二牺牲层上形成光致抗蚀剂层。 在光致抗蚀剂层中形成开口。 然后在光致抗蚀剂层中的开口下方的第二牺牲层中形成开口。 然后在光致抗蚀剂层中扩展开口，以暴露第二牺牲层的顶表面的部分围绕第二牺牲层中的开口。 所述开口在所述第二牺牲层中延伸穿过所述第一牺牲层，并且所述开口在所述第二牺牲层中膨胀以在所述第一和第二牺牲层中形成T形开口。 去除光致抗蚀剂层，并用导电材料填充T形开口。
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公开(公告)号：US06313019B1
公开(公告)日：2001-11-06
申请号：US09643343
申请日：2000-08-22
IPC分类号： H01L2144
CPC分类号： H01L21/28114 , H01L29/42376 , Y10S438/978
摘要： A method for fabricating a Y-gate structure is provided. The method comprises the steps of providing a silicon layer having a gate oxide layer, a protection layer over the gate oxide layer, a first sacrificial layer over the protection layer and a second sacrificial layer over the first sacrificial layer. An inwardly sloping opening is formed in the second sacrificial layer and the opening is extended vertically in the first sacrificial layer. A contact material is deposited over the second sacrificial layer filling the opening with the contact material and forming a contact layer and portions of the contact material outside a gate region are removed. The first sacrificial layer and the second sacrificial layer are then removed.
摘要翻译： 提供一种制造Y栅极结构的方法。 该方法包括以下步骤：提供具有栅极氧化物层的硅层，栅极氧化物层上的保护层，保护层上的第一牺牲层和第一牺牲层上的第二牺牲层。 在第二牺牲层中形成向内倾斜的开口，并且开口在第一牺牲层中垂直延伸。 接触材料沉积在用接触材料填充开口的第二牺牲层上，并形成接触层，并且去除栅极区域外部的接触材料的部分。 然后去除第一牺牲层和第二牺牲层。
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公开(公告)号：US06270929B1
公开(公告)日：2001-08-07
申请号：US09619789
申请日：2000-07-20
IPC分类号： H01L21302
CPC分类号： H01L21/28114 , H01L21/0273 , H01L21/0338 , H01L21/31144 , H01L21/76802 , H01L29/42376
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. A photoresist layer is formed over the insulating layer. An opening is the formed extending through the photoresist layer and partially into the insulating layer. The opening in the insulating layer extends from a top surface of the insulating layer to a first depth. The photoresist layer is swelled to reduce the size of the opening in the photoresist layer. The opening is then extended in the insulating layer from the first depth to a second depth. The opening is wider from the top surface of the insulating layer to the first depth than the opening is from the first depth to the second depth. The opening is then filled with a conductive material to form a T-gate structure.
摘要翻译： 提供了一种制造T型栅结构的方法。 提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层和栅极氧化物层上的绝缘层。 在绝缘层上形成光致抗蚀剂层。 开口形成为延伸穿过光致抗蚀剂层并部分地进入绝缘层。 绝缘层中的开口从绝缘层的顶表面延伸到第一深度。 光致抗蚀剂层被膨胀以减小光致抗蚀剂层中的开口的尺寸。 然后将开口在绝缘层中从第一深度延伸到第二深度。 开口从绝缘层的顶表面到比第一深度从第一深度到第二深度的第一深度更宽。 然后用导电材料填充开口以形成T形栅结构。
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公开(公告)号：US06605546B1
公开(公告)日：2003-08-12
申请号：US09901699
申请日：2001-07-11
IPC分类号： H01L21302
CPC分类号： H01L21/76808
摘要： A method for forming a semiconductor device comprises forming a first layer over a semiconductor substrate. At least one hole is formed through the first layer. A bottom anti-reflective coating (BARC) layer is formed in the at least one hole. A first heating is performed to heat the BARC layer to a flow temperature. A second heating is performed to heat the BARC layer to a hardening temperature so that the BARC layer hardens, wherein the hardening temperature is greater than the flow temperature. An etch is performed to form a trench in the first layer and over the at least one hole, wherein the hardened BARC layer in the at least one hole acts as an etch resistant layer during the etch. As an alternative to the second heating step, the BARC may be simply hardened. The first and second heating may be performed within a heating chamber without removing the semiconductor substrate.
摘要翻译： 一种用于形成半导体器件的方法包括在半导体衬底上形成第一层。 通过第一层形成至少一个孔。 在至少一个孔中形成底部抗反射涂层（BARC）层。 执行第一次加热以将BARC层加热至流动温度。 执行第二次加热以将BARC层加热至硬化温度，使得BARC层硬化，其中硬化温度大于流动温度。 进行蚀刻以在第一层中和在至少一个孔上形成沟槽，其中至少一个孔中的硬化的BARC层在蚀刻期间用作耐蚀刻层。 作为第二加热步骤的替代方案，BARC可以简单地硬化。 第一和第二加热可以在加热室内进行，而不去除半导体衬底。
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8.发明授权Use of silicon containing imaging layer to define sub-resolution gate structures 有权使用含硅成像层来定义次分辨率门结构公开(公告)号：US06534418B1
公开(公告)日：2003-03-18
申请号：US09845656
申请日：2001-04-30
IPC分类号： H01L21302
CPC分类号： H01L21/0338 , H01L21/0337 , H01L21/28123 , H01L29/6659 , H01L29/7833
摘要： An exemplary method of using silicon containing imaging layers to define sub-resolution gate structures can include depositing an anti-reflective coating over a layer of polysilicon, depositing an imaging layer over the anti-reflective coating, selectively etching the anti-reflective coating to form a pattern, and removing portions of the polysilicon layer using the pattern formed from the removed portions of anti-reflective coating. Thus, the use of thin imaging layer, that has high etch selectivity to the organic underlayer, allows the use of trim etch techniques without a risk of resist erosion or aspect ratio pattern collapse. That, in turn, allows for the formation of the gate pattern with widths less than the widths of the pattern of the imaging layer.
摘要翻译： 使用含硅成像层来限定次分辨率门结构的示例性方法可以包括在多晶硅层上沉积抗反射涂层，在抗反射涂层上沉积成像层，选择性地蚀刻抗反射涂层以形成 使用由抗反射涂层的去除部分形成的图案去除多晶硅层的部分。 因此，对有机底层具有高蚀刻选择性的薄成像层的使用允许使用修剪蚀刻技术，而不会有抗蚀剂侵蚀或高宽比图案崩溃的风险。 这又反过来允许形成具有小于成像层的图案的宽度的宽度的栅极图案。
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9.发明授权公开(公告)号：US06458691B1
公开(公告)日：2002-10-01
申请号：US09824662
申请日：2001-04-04
IPC分类号： H01L214763
CPC分类号： H01L21/31144 , H01L21/76807
摘要： There is provided a method of making a dual inlaid via in a first layer. The first layer may be a polymer intermetal dielectric, such as HSQ, of a semiconductor device. The method includes forming a first opening, such as a via, in the first layer and forming an inorganic base radiation sensitive layer in the first opening. The radiation sensitive layer may be a polysilane imaging layer. The inorganic base radiation sensitive layer is selectively exposed to radiation and then patterned. A second opening, such a trench, is formed in communication with the first opening using the patterned inorganic base radiation sensitive layer as a mask. A conductive layer may be formed in the dual inlaid via to complete a dual damascene process.
摘要翻译： 提供了在第一层中制作双重嵌入通孔的方法。 第一层可以是半导体器件的聚合物金属间电介质，例如HSQ。 该方法包括在第一层中形成诸如通孔的第一开口，并在第一开口中形成无机碱辐射敏感层。 辐射敏感层可以是聚硅烷成像层。 无机碱辐射敏感层选择性地暴露于辐射，然后图案化。 使用图案化的无机基底辐射敏感层作为掩模，形成与第一开口连通的第二开口，这样的沟槽。 可以在双镶嵌通孔中形成导电层以完成双镶嵌工艺。
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10.发明授权Sensor to predict void free films using various grating structures and characterize fill performance 失效传感器预测使用各种光栅结构的无空隙膜，并表征填充性能公开(公告)号：US06684172B1
公开(公告)日：2004-01-27
申请号：US10034165
申请日：2001-12-27
申请人： Ramkumar Subramanian , Steven C. Avanzino , Christopher F. Lyons , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Cyrus E. Tabery
发明人： Ramkumar Subramanian , Steven C. Avanzino , Christopher F. Lyons , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Cyrus E. Tabery
IPC分类号： G01L2500
CPC分类号： C23C16/52 , C23C14/547 , C23C18/1675 , C25D21/12 , H01L21/76877
摘要： One aspect of the invention relates to a metal fill process and systems therefor involving providing a standard calibration wafer having a plurality of fill features of known dimensions in a metalization tool; depositing a metal material over the standard calibration wafer; monitoring the deposition of metal material using a sensor system, the sensor system operable to measure one or more fill process parameters and to generate fill process data; controlling the deposition of metal material to minimize void formation using a control system wherein the control system receives fill process data from the sensor system and analyzes the fill process data to generate a feed-forward control data operative to control the metalization tool; and depositing metal material over a production wafer in the metalization tool using the fill process data generated by the sensor system and the control system. The invention further relates to tool characterization processes and systems therefor.
摘要翻译： 本发明的一个方面涉及一种金属填充方法及其系统，其涉及在金属化工具中提供具有已知尺寸的多个填充特征的标准校准晶片; 在标准校准晶片上沉积金属材料; 使用传感器系统监测金属材料的沉积，所述传感器系统可操作以测量一个或多个填充过程参数并产生填充过程数据; 控制金属材料的沉积以最小化使用控制系统的空隙形成，其中控制系统从传感器系统接收填充过程数据并分析填充过程数据以产生可操作以控制金属化工具的前馈控制数据; 以及使用由传感器系统和控制系统产生的填充过程数据在金属化工具中的生产晶片上沉积金属材料。 本发明还涉及其工具表征过程及其系统。
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