Code preparation technique employing lock-free pointer operations
    1.
    发明申请
    Code preparation technique employing lock-free pointer operations 有权
    采用无锁指针操作的代码准备技术

    公开(公告)号:US20060218561A1

    公开(公告)日:2006-09-28

    申请号:US11343678

    申请日:2006-01-30

    IPC分类号: G06F9/46

    摘要: A methodology has been discovered for transforming garbage collection-dependent algorithms, shared object implementations and/or concurrent software mechanisms into a form that does not presume the existence of an independent, or execution environment provided, garbage collector. Algorithms, shared object implementations and/or mechanisms designed or transformed using techniques described herein provide explicit reclamation of storage using lock-free pointer operations. Transformations can be applied to lock-free algorithms and shared object implementations and preserve lock-freedom of such algorithms and implementations. As a result, existing and future lock-free algorithms and shared object implementations that depend on a garbage-collected execution environment can be exploited in environments that do not provide garbage collection. Furthermore, algorithms and shared object implementations that employ explicit reclamation of storage using lock-free pointer operations such as described herein may be employed in the implementation of a garbage collector itself.

    摘要翻译: 已经发现了一种方法,用于将垃圾回收依赖算法,共享对象实现和/或并发软件机制转换为不假定存在独立或执行环境(垃圾收集器)的形式。 使用本文描述的技术设计或变换的算法,共享对象实现和/或机制使用无锁指针操作来提供存储的显式回收。 转换可以应用于无锁算法和共享对象实现,并保持这种算法和实现的锁定自由度。 因此,依赖于垃圾回收执行环境的现有和将来的无锁算法和共享对象实现可以在不提供垃圾回收的环境中被利用。 此外,使用如本文所述的无锁定指针操作的使用显式回收存储的算法和共享对象实现可以用于实现垃圾收集器本身。

    Concurrency technique for shared objects
    2.
    发明申请
    Concurrency technique for shared objects 审中-公开
    共享对象的并发技术

    公开(公告)号:US20060161737A1

    公开(公告)日:2006-07-20

    申请号:US11384627

    申请日:2006-03-20

    IPC分类号: G06F13/28

    摘要: In some embodiments, a Hat Trick deque requires only a single DCAS for most pushes and pops. The left and right ends do not interfere with each other until there is one or fewer items in the queue, and then a DCAS adjudicates between competing pops. By choosing a granularity greater than a single node, the user can amortize the costs of adding additional storage over multiple push (and pop) operations that employ the added storage. A suitable removal strategy can provide similar amortization advantages. The technique of leaving spare nodes linked in the structure allows an indefinite number of pushes and pops at a given deque end to proceed without the need to invoke memory allocation or reclamation so long as the difference between the number of pushes and the number of pops remains within given bounds. Both garbage collection dependent and explicit reclamation implementations are described.

    摘要翻译: 在一些实施例中,帽子技巧deque仅需要单个DCAS用于大多数按压和弹出。 在队列中有一个或多个项目之前,左右两端不会相互干扰,然后DCAS在竞争弹出之间进行裁决。 通过选择大于单个节点的粒度,用户可以通过使用添加的存储的多个推送(和弹出)操作来分摊添加附加存储的成本。 合适的清除策略可以提供类似的摊销优势。 在结构中链接的备用节点的技术允许在给定的deque端的无限数量的推送和弹出进行,而不需要调用内存分配或回收,只要推送次数和流量数之间的差异保持不变 在给定范围内。 描述垃圾收集相关和显式回收实现。

    Lock-free double-ended queue based on a dynamic ring
    3.
    发明申请
    Lock-free double-ended queue based on a dynamic ring 有权
    基于动态环的无锁双端队列

    公开(公告)号:US20070157214A1

    公开(公告)日:2007-07-05

    申请号:US11325209

    申请日:2006-01-03

    IPC分类号: G06F9/46

    CPC分类号: G06F9/52 G06F7/785 G06F9/544

    摘要: One embodiment of the present invention provides a system that facilitates performing operations on a lock-free double-ended queue (deque). This deque is implemented as a doubly-linked list of nodes formed into a ring, so that node pointers in one direction form an inner ring, and node pointers in the other direction form an outer ring. The deque has an inner hat, which points to a node next to the last occupied node along the inner ring, and an outer hat, which points to a node next to the last occupied node along the outer ring. The system uses a double compare-and-swap (DCAS) operation while performing pop and push operations onto either end of the deque, as well as growing and shrinking operations to change the number of nodes that are in the ring used by the deque.

    摘要翻译: 本发明的一个实施例提供一种有助于在无锁双端队列(deque)上执行操作的系统。 该deque被实现为形成环的节点的双向链表,使得在一个方向上的节点指针形成内环,并且在另一方向上的节点指针形成外环。 德克有一个内帽,它指向沿着内圈的最后一个占用节点旁边的一个节点,以及一个外帽,它指向沿着外圈的最后占用节点旁边的一个节点。 系统使用双重比较和交换(DCAS)操作,同时在deque的任一端执行弹出和推送操作,以及增长和缩小操作以更改由deque使用的环中的节点数。

    Comparator unit for comparing values of floating point operands

    公开(公告)号:US20060206548A1

    公开(公告)日:2006-09-14

    申请号:US11394081

    申请日:2006-03-31

    申请人: Guy Steele

    发明人: Guy Steele

    IPC分类号: G06F15/00

    摘要: A floating point comparator circuit for comparing a plurality of floating point operands includes a plurality of analysis circuits, one for each of the floating point operands, configured to determine a format of each of the floating point operands based upon floating point status information encoded within each of the floating point operands, and a result generator circuit coupled to the analysis circuits, the result generator circuit configured to generate a result signal based on the format determined by each analysis circuit and based on a comparative relationship among the floating point operands. The format of each of the floating point operands may be from a group comprising: not-a-number (NaN), infinity, normalized, denormalized, zero, invalid operation, overflow, underflow, division by zero, exact, and inexact. The result generator circuit may ignore the encoded floating point statuses of the plurality of floating point operands when comparing just the magnitudes of the plurality of floating point operands.

    Apparatus and method for assisting exact garbage collection by using a
stack cache of tag bits
    5.
    发明授权
    Apparatus and method for assisting exact garbage collection by using a stack cache of tag bits 失效
    通过使用标签位的堆栈缓存来辅助确切的垃圾收集的装置和方法

    公开(公告)号:US6101580A

    公开(公告)日:2000-08-08

    申请号:US838971

    申请日:1997-04-23

    摘要: In computer systems which do not inherently distinguish between references and primitive values within a program stack a method and apparatus to assist exact garbage collection techniques utilizes a stack tag cache which operates in conjunction with a program stack and supplies a tag item for every entry in the process stack. The value of a tag item indicates whether the stack entry is either a reference to another memory location or a primitive value, i.e. integer or floating point number. The arrangements and values of the tag items are correlated with changes to the program stack. The stack tag cache includes facilities for swapping the contents of the cache in the event of a trap or context switch, as well as means for redundantly verifying the tag value with intended instruction operand types.

    摘要翻译: 在程序堆栈内并不固有地区分参考和原始值的计算机系统中,帮助精确垃圾收集技术的方法和装置利用与程序堆栈一起操作的栈标签高速缓存,并为 进程堆栈 标签项的值指示堆栈条目是对另一存储器位置的引用还是原始值,即整数或浮点数。 标签项的排列和值与程序堆栈的更改相关。 堆栈标签缓存包括用于在陷阱或上下文切换的情况下交换高速缓存的内容的设备,以及用于用期望的指令操作数类型冗余地验证标签值的装置。

    Vehicle body lowering system
    6.
    发明授权
    Vehicle body lowering system 失效
    车体降低系统

    公开(公告)号:US5700026A

    公开(公告)日:1997-12-23

    申请号:US745296

    申请日:1996-11-08

    摘要: A vehicle body lowering system for installation in a motor vehicle having a wheeled carriage, a cargo/passenger compartment body, a door in the passenger compartment body for cargo loading and unloading or passenger embarking and debarking, and a spring suspension for the buoyant support of the body above the carriage between a lower position and an upper position. The components of the vehicle body lowering system include a hydraulic cylinder mounted within the body, a power source, a manually actuated control for energizing and deenergizing the power source, and an interconnection extending through the body between the cylinder and the carriage. The interconnection is characterized by an operative condition at which the body is in the lower position under the control of the power source, and an inoperative condition at which the body is freely subject to the buoyant support of the spring suspension.

    摘要翻译: 一种用于安装在具有轮式车厢,货物/乘客舱主体,乘客舱体中用于货物装载和卸载或乘客登陆和剥皮的门的车身下降系统,以及用于浮动支架的弹簧悬架 滑架上方的主体位于下部位置和上部位置之间。 车体下降系统的部件包括安装在主体内的液压缸,动力源,用于激励和断电的手动致动控制装置,以及在气缸和滑架之间穿过本体延伸的互连件。 互连的特征在于在电源的控制下主体处于较低位置的操作状态,以及身体自由地受到弹簧悬架的浮力支撑的不工作状态。

    Vehicle body lowering system
    7.
    发明授权
    Vehicle body lowering system 失效
    车体降低系统

    公开(公告)号:US5573266A

    公开(公告)日:1996-11-12

    申请号:US387474

    申请日:1995-02-13

    摘要: The vehicle body lowering system of the present invention is installed in a motor vehicle having a wheeled carriage, a cargo/passenger compartment body, a door in the passenger compartment body for cargo loading and unloading or passenger embarking and debarking, and a spring suspension for the buoyant support of the body above the carriage between a lower position and an upper position. The components of the vehicle body lowering system include a drive for forcing the body into the lower position, where the drive comprises a power source and an interconnection between the body and the carriage, and a manually actuated control for energizing and deenergizing the power source. The interconnection is characterized by an operative condition at which the body is in the lower position under the control of the power source, and an inoperative condition at which the body is freely subject to the buoyant support of the spring suspension. The interconnection has at least one coupling to the body and at least one coupling to the carriage.

    摘要翻译: 本发明的车体下降系统安装在具有轮式车厢,货物/乘客舱体,乘客舱体内用于货物装载和卸载或乘客登陆和剥皮的门的机动车辆中,以及用于 在下部位置和上部位置之间的滑架上方的主体的浮力支撑。 车体下降系统的部件包括用于将本体压入下部位置的驱动器,其中驱动器包括电源以及主体和滑架之间的互连,以及用于激励和断电的手动驱动控制。 互连的特征在于在电源的控制下主体处于较低位置的操作状态,以及身体自由地受到弹簧悬架的浮力支撑的不工作状态。 互连具有至少一个与主体的联接和至少一个与滑架的连接。

    Circuit for selectively providing maximum or minimum of a pair of floating point operands

    公开(公告)号:US20060242215A1

    公开(公告)日:2006-10-26

    申请号:US11394080

    申请日:2006-03-31

    申请人: Guy Steele

    发明人: Guy Steele

    IPC分类号: G06F7/00

    摘要: A floating point max/min circuit for determining the maximum or minimum of two floating point operands includes a first analysis circuit configured to determine a format of a first floating point operand of the two floating point operands based upon floating point status information encoded within the first floating point operand, a second analysis circuit configured to determine a format of a second floating point operand of the two floating point operands based upon floating point status information encoded within the second floating point operand, a decision circuit, coupled to the first analysis circuit and to the second analysis circuit and responding to a function control signal that indicates the threshold condition is one of a maximum of the two floating point operands and a minimum of the two floating point operands, for generating at least one assembly control signal based on the format of a first floating point operand, the format of a second floating point operand, and the function control signal, and a result assembler circuit, coupled to the decision circuit, for producing a result indicating which of the first floating point operand and the second floating point operand meet the threshold condition, based on the at least one assembly control signal. The format of the floating point operands may be from a group comprising: not-a-number (NaN), positive infinity, negative infinity, normalized, denormalized, positive overflow, negative overflow, positive underflow, negative underflow, inexact, exact, division by zero, invalid operation, positive zero, and negative zero. The result produced may be a third floating point operand having encoded floating point status information, and at least part of the encoded floating point status information in the result may come from either the first floating point operand or the second floating point operand.

    Total order comparator unit for comparing values of two floating point operands

    公开(公告)号:US20060179104A1

    公开(公告)日:2006-08-10

    申请号:US11394083

    申请日:2006-03-31

    申请人: Guy Steele

    发明人: Guy Steele

    IPC分类号: G06F7/50

    CPC分类号: G06F7/026 G06F7/483

    摘要: A floating point total order comparator circuit for comparing a first floating point operand and a second floating point operand includes a first analysis circuit for determining a format of the first floating point operand based upon floating point status information encoded within the first floating point operand, a second analysis circuit for determining a format of the second floating point operand based upon floating point status information encoded within the second floating point operand, and a result generator circuit coupled to the analysis circuits for producing a result indicating a total order comparative relationship between the first floating point operand and the second floating point operand based on the format of the first floating point operand and the format of the second floating point operand. The result can condition the outcome of a floating point instruction. The floating point total order comparator circuit may recognize several predetermined operand formats, such as not-a-number (NaN), infinity, normalized, denormalized, invalid operation, overflow, underflow, division by zero, positive zero, negative zero, exact, and inexact.