公开(公告)号：US07660567B1

公开(公告)日：2010-02-09

申请号：US11531886

申请日：2006-09-14

Applicant: Mark R. Gehring ,  Joseph D. Stenger

Inventor： Mark R. Gehring ,  Joseph D. Stenger

IPC: H04B17/00

CPC classification number: H04B17/318

Abstract: An improved Received Signal Strength Indicator (RSSI) circuit and method is provided herein for quickly and accurately detecting the strength of a received signal. The circuit described herein provides a more accurate RSSI signal, while consuming less power and die area, by utilizing digital rather than analog summing.

Abstract translation: 本文提供了一种改进的接收信号强度指示（RSSI）电路和方法，用于快速准确地检测接收信号的强度。 本文描述的电路通过利用数字而不是模拟求和来提供更准确的RSSI信号，同时消耗更少的功率和管芯面积。

公开(公告)号：US07057434B1

公开(公告)日：2006-06-06

申请号：US10834950

申请日：2004-04-28

Applicant: Mark R. Gehring ,  Russell R. Moen ,  Joseph D. Stenger ,  Eric Mitchell

Inventor： Mark R. Gehring ,  Russell R. Moen ,  Joseph D. Stenger ,  Eric Mitchell

IPC: H03K5/01 ,  H03B1/00 ,  H03L1/00

CPC classification number: H03L3/00

Abstract: A crystal oscillator circuit which does not produce runt pulses when the oscillator is turned on or off. The circuit includes a crystal oscillator, an integrator which integrates the energy in a plurality of pulses, a threshold circuit which is active when the output of the integrator reaches a pre-specified threshold and gating circuits which gate the output of the crystal oscillator to the output terminal only when the threshold circuit has reached the specified threshold.

Abstract translation: 振荡器开启或关闭时不产生欠压脉冲的晶振电路。 该电路包括晶体振荡器，积分器，其将多个脉冲中的能量进行积分;阈值电路，当积分器的输出达到预定阈值时有效;门控电路将晶体振荡器的输出选通到 输出端只有当阈值电路达到指定的阈值时。

公开(公告)号：US08112054B2

公开(公告)日：2012-02-07

申请号：US11467346

申请日：2006-08-25

Applicant: Mark R. Gehring ,  Nathan Moyal

Inventor： Mark R. Gehring ,  Nathan Moyal

IPC: H04B1/06

CPC classification number: H03L7/0802 ,  H03L7/0891 ,  H03L7/14 ,  H03L7/18

Abstract: In a system with an intermittently operating radio, the frequency of which is controlled by a Phase Locked Loop (PLL), a method and system for reducing the power consumed by the PLL by tri-stating the control capacitor in the PLL after the PLL has stabilized at a design frequency. After the capacitor is stabilized, power to some of the components in the PLL is reduced.

Abstract translation: 在具有间歇操作无线电的系统中，其频率由锁相环（PLL）控制，一种用于通过在PLL之后对PLL中的控制电容器进行三态化来降低PLL消耗的功率的方法和系统 稳定在设计频率。 电容器稳定后，PLL中某些组件的电源减少。

公开(公告)号：US07805113B2

公开(公告)日：2010-09-28

申请号：US11427712

申请日：2006-06-29

Applicant: Mark R. Gehring ,  Russell R. Moen

Inventor： Mark R. Gehring ,  Russell R. Moen

IPC: H04B1/44

CPC classification number: H04B1/28

Abstract: A method of communication between a first transceiver having a first local oscillator set at a first frequency and a second transceiver having a second local oscillator set at a second frequency disclosed. The method includes transmitting a first signal at a first frequency from the first transceiver to the second transceiver, transmitting a second signal at the second frequency from the second transceiver to the first transceiver, and receiving the second signal at the first transceiver. The method further includes maintaining the first local oscillator at the first frequency and the second local oscillator at the second frequency during the transmitting of the first signal, during the receiving of the first signal, during the transmitting of the second signal, and during the receiving of the second signal.

Abstract translation: 一种在具有以第一频率设置的第一本地振荡器的第一收发器和第二收发器之间的通信方法，所述第二收发器具有以公开的第二频率设置的第二本地振荡器。 该方法包括以第一频率从第一收发机向第二收发信机发射第一信号，以第二频率将第二信号从第二收发信机发射到第一收发信机，以及在第一收发信机接收第二信号。 该方法还包括在发送第一信号期间，在接收第一信号期间，在发送第二信号期间以及在接收期间，将第一本地振荡器保持在第一频率处的第一本地振荡器和第二本地振荡器处于第二频率 的第二信号。

公开(公告)号：US07683694B2

公开(公告)日：2010-03-23

申请号：US11686324

申请日：2007-03-14

Applicant: Mark R. Gehring

Inventor： Mark R. Gehring

IPC: G06G7/24

CPC classification number: H03D1/18

Abstract: A logarithmic detector circuit including a drive circuit to receive a modulated input signal and generate a buffered modulated signal, a signal shaping circuit coupled to the drive circuit and configured to shape a voltage range of the buffered modulated signal to generate a shaped modulated signal, and a detecting circuit to detect the shaped modulated signal to generate an output signal substantially proportional to a logarithm of an amplitude of the modulated input signal.

Abstract translation: 一种对数检测器电路，包括用于接收经调制的输入信号并产生缓冲的调制信号的驱动电路，耦合到驱动电路并被配置成对缓冲的调制信号的电压范围进行整形以产生成形的调制信号的信号整形电路，以及 检测电路，用于检测整形调制信号以产生基本上与调制输入信号的幅度的对数成比例的输出信号。

公开(公告)号：US20080225988A1

公开(公告)日：2008-09-18

申请号：US11686324

申请日：2007-03-14

Applicant: Mark R. Gehring

Inventor： Mark R. Gehring

IPC: H03D1/24

CPC classification number: H03D1/18

Abstract: A logarithmic detector circuit including a drive circuit to receive a modulated input signal and generate a buffered modulated signal, a signal shaping circuit coupled to the drive circuit and configured to shape a voltage range of the buffered modulated signal to generate a shaped modulated signal, and a detecting circuit to detect the shaped modulated signal to generate an output signal substantially proportional to a logarithm of an amplitude of the modulated input signal.

Abstract translation: 一种对数检测器电路，包括用于接收经调制的输入信号并产生缓冲的调制信号的驱动电路，耦合到驱动电路并被配置成对缓冲的调制信号的电压范围进行整形以产生成形的调制信号的信号整形电路，以及 检测电路，用于检测整形调制信号以产生基本上与调制输入信号的幅度的对数成比例的输出信号。

公开(公告)号：US20100194440A1

公开(公告)日：2010-08-05

申请号：US12761245

申请日：2010-04-15

Applicant: Serge F. Drogi ,  Vikas Vinayak ,  Mark R. Gehring ,  Martin A. Tomasz

Inventor： Serge F. Drogi ,  Vikas Vinayak ,  Mark R. Gehring ,  Martin A. Tomasz

IPC: H03D13/00

CPC classification number: H03F1/0205 ,  H03F1/0227 ,  H03F1/0238 ,  H03F1/3247 ,  H03F2200/451 ,  H03F2200/78 ,  H03F2200/99 ,  H03G3/004 ,  H03G3/3042

Abstract: A system including a phase comparator to compare a first signal and a second signal to generate a phase error signal, and a controller to generate an adjusted phase error signal from the phase error signal in response to an amplitude of at least one of the first signal and the second signal.

公开(公告)号：US07746922B2

公开(公告)日：2010-06-29

申请号：US11297505

申请日：2005-12-07

Applicant: Mark R. Gehring ,  David Wright

Inventor： Mark R. Gehring ,  David Wright

IPC: H04Q1/20

CPC classification number: H04L1/203 ,  H04B17/318 ,  H04L1/16 ,  H04L2027/0016 ,  H04L2027/002 ,  H04L2027/0034

Abstract: Wireless devices transmit and receive radio signals based upon reference frequencies generated by crystal oscillators. If the reference frequencies of the transmitter and the receiver are different, the radio signals may not be received properly or may not be received at all. A measurement circuit measures the amount of error or signal corruption in the radio signals due to the reference frequency offset between the transmitter and the receiver. A frequency offset circuit generates an offset operating frequency in the transmitter or the receiver to align or calibrate the operating frequencies of the devices.

Abstract translation: 无线设备基于由晶体振荡器产生的参考频率发射和接收无线电信号。 如果发射机和接收机的参考频率不同，则无线电信号可能未被正确接收或根本不被接收。 测量电路测量由于发射机和接收机之间的参考频率偏移导致的无线电信号中的误差或信号损坏量。 频率偏移电路在发射器或接收器中产生偏移操作频率以对准或校准装置的工作频率。

公开(公告)号：US07439820B2

公开(公告)日：2008-10-21

申请号：US11465439

申请日：2006-08-17

Applicant: Mark R. Gehring

Inventor： Mark R. Gehring

IPC: H03B5/32

CPC classification number: H03B5/32 ,  H03B5/06 ,  H03B2200/0094 ,  H03L7/00

Abstract: A method and system for initiating the oscillation of a crystal that controls a crystal oscillator by applying an initiating pulse to said crystal. The initiating pulse having a pulse width less than one half the periodicity of said crystal.

Abstract translation: 一种用于通过向所述晶体施加起始脉冲来启动控制晶体振荡器的晶体的振荡的方法和系统。 该起始脉冲的脉冲宽度小于所述晶体周期的一半。

公开(公告)号：US4977399A

公开(公告)日：1990-12-11

申请号：US230201

申请日：1988-08-09

Applicant: Gary A. Price ,  Daniel J. Park ,  Mark R. Gehring

Inventor： Gary A. Price ,  Daniel J. Park ,  Mark R. Gehring

IPC: H04B17/00 ,  H04B7/26 ,  H04W16/18 ,  H04W84/00

CPC classification number: H04W84/00 ,  H04W16/18

Abstract: In a ratio paging system of the type having digital data modulated onto radio signals transmitted from a radio station to receiving units at remote sites, a test system. The test system includes a transmitter test module coupled to a radio transmitter at the station and a test bed module located at the remote site. The transmitter test module includes a microprocessor for generating digital test data, and a modulator coupled to the microprocessor for modulating the test data onto a radio signal and for injecting the radio signal into the station transmitter. The test bed includes a receiver for receiving the modulated radio signal, a demodulator for demodulating the received radio signal to recover the digital test data, and a computer for processing the recovered digital test data to generate paging test information. The mobile test bed also includes means for determining the latitude and longitude of a site to generate digital location data which is used to generate test information. The test system further includes a mobile vehicle for transporting the test bed, a power supply in the vehicle for providing power to the test bed, and means for determining the distance travelled by the vehicle to provide a test sampling rate. The test bed and the transmitter test module may communicate using a cellular phone ystem for transmitting and receiving coded dial tones. The coded dial tones correspond to predetermined digital test data patterns and other test information.

Abstract translation: 在具有数字数据的类型的比例寻呼系统被调制到从无线电台发送到远程站点的接收单元的无线电信号上的测试系统。 测试系统包括耦合到站上的无线电发射机的发射机测试模块和位于远端站点的测试台模块。 发射机测试模块包括用于产生数字测试数据的微处理器，以及耦合到微处理器的调制器，用于将测试数据调制到无线电信号上并将无线电信号注入到站发射机中。 测试台包括用于接收调制无线电信号的接收机，用于解调所接收的无线电信号以恢复数字测试数据的解调器，以及用于处理恢复的数字测试数据以生成寻呼测试信息的计算机。 移动测试台还包括用于确定站点生成用于生成测试信息的数字位置数据的纬度和经度的装置。 测试系统还包括用于运送测试台的移动车辆，用于向测试台提供动力的车辆中的电源，以及用于确定车辆行驶距离以提供测试采样率的装置。 测试台和发射机测试模块可以使用蜂窝电话模块进行通信，用于发送和接收编码拨号音。 编码拨号音对应于预定的数字测试数据模式和其他测试信息。