Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
    1.
    发明申请
    Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same 失效
    双极晶体管具有可选择的自对准的外部基极和其形成方法

    公开(公告)号:US20060081934A1

    公开(公告)日:2006-04-20

    申请号:US11289915

    申请日:2005-11-30

    IPC分类号: H01L23/62

    摘要: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.

    摘要翻译: 公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。 制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。 然后通过在第一非本征基层上的光刻形成电介质着色焊盘。 接下来,在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层,以最终确定凸出的非本征基本总厚度。 使用光刻和RIE形成发射器开口,其中第二外部基极层被蚀刻停止在电介质着色焊盘上。 通过选择第一非本征基极层厚度,电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

    BIPOLAR TRANSISTOR HAVING RAISED EXTRINSIC BASE WITH SELECTABLE SELF-ALIGNMENT AND METHODS OF FORMING SAME
    2.
    发明申请
    BIPOLAR TRANSISTOR HAVING RAISED EXTRINSIC BASE WITH SELECTABLE SELF-ALIGNMENT AND METHODS OF FORMING SAME 有权
    具有可选择的自对准的提升的超级基座的双极晶体管及其形成方法

    公开(公告)号:US20050048735A1

    公开(公告)日:2005-03-03

    申请号:US10604988

    申请日:2003-08-29

    摘要: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.

    摘要翻译: 公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。 制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。 然后通过在第一非本征基层上的光刻形成电介质着色焊盘。 接下来,在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层,以最终确定凸出的非本征基本总厚度。 使用光刻和RIE形成发射器开口,其中第二外部基极层被蚀刻停止在电介质着色焊盘上。 通过选择第一非本征基极层厚度,电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

    Bipolar transistor with a very narrow emitter feature
    3.
    发明申请
    Bipolar transistor with a very narrow emitter feature 失效
    双极晶体管具有非常窄的发射极特性

    公开(公告)号:US20050082642A1

    公开(公告)日:2005-04-21

    申请号:US10978775

    申请日:2004-11-01

    摘要: A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped intrinsic emitter formed in the surface of the intrinsic base. An etch stop insulator layer overlies the intrinsic base layer above the collector. A base contact layer of a conductive material overlies the etch stop dielectric layer and the intrinsic base layer. A dielectric layer overlies the base contact layer. A wide window extends through the insulator layer and the base contact layer down to the insulator layer. An island or a peninsula is formed in the wide window leaving at least one narrowed window within the wide window, with sidewall spacers in either the wide window or the narrowed window. The narrowed windows are filled with doped polysilicon forming an extrinsic emitter with the intrinsic emitter formed below the extrinsic emitter in the surface of the intrinsic base.

    摘要翻译: 双重多晶硅,自对准双极晶体管具有在掺杂半导体衬底中形成的集电极区域,形成在衬底表面上的本征反掺杂基底和形成在本征基底表面的掺杂本征发射极。 蚀刻停止绝缘体层覆盖在收集器上方的本征基极层。 导电材料的基极接触层覆盖在蚀刻停止介电层和本征基极层之间。 电介质层覆盖在基底接触层上。 宽窗口延伸穿过绝缘体层和基底接触层向下延伸到绝缘体层。 在宽窗口中形成岛或半岛,在宽窗口内留下至少一个变窄的窗口,在宽窗口或狭窄窗口中具有侧壁间隔物。 变窄的窗口填充有掺杂的多晶硅,其形成外部发射极,本征发射极在本征基极表面的外部发射极之下形成。

    BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE
    4.
    发明申请
    BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE 失效
    具有自对准改性的双极晶体管超基底植入型材和自对准硅胶

    公开(公告)号:US20070275535A1

    公开(公告)日:2007-11-29

    申请号:US11838948

    申请日:2007-08-15

    IPC分类号: H01L21/331

    摘要: Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the substrate above the intrinsic base. Before actually forming the emitter or associates spacer, the invention forms an extrinsic base in regions of the substrate not protected by the emitter pedestal. After this, the invention removes the emitter pedestal and eventually forms the emitter where the emitter pedestal was positioned.

    摘要翻译: 公开了一种在集成电路结构中形成晶体管的方法,其通过在基板中形成集电体和在集电极之上形成本征基极而开始。 然后,本发明在基底上方的发光体的下部的内部基底上形成发射极基座。 在实际形成发射极或者相关的间隔物之前,本发明在不受发射极基座保护的衬底的区域中形成非本征基极。 之后,本发明去除发射器基座并最终形成发射器底座所在的发射极。

    BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE
    5.
    发明申请
    BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE 失效
    具有自对准改性的双极晶体管超基底植入型材和自对准硅胶

    公开(公告)号:US20060097350A1

    公开(公告)日:2006-05-11

    申请号:US10904437

    申请日:2004-11-10

    摘要: Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the substrate above the intrinsic base. Before actually forming the emitter or associates spacer, the invention forms an extrinsic base in regions of the substrate not protected by the emitter pedestal. After this, the invention removes the emitter pedestal and eventually forms the emitter where the emitter pedestal was positioned.

    摘要翻译: 公开了一种在集成电路结构中形成晶体管的方法,其通过在基板中形成集电体和在集电极之上形成本征基极而开始。 然后,本发明在基底上方的发光体的下部的内部基底上形成发射极基座。 在实际形成发射极或者相关的间隔物之前,本发明在不受发射极基座保护的衬底的区域中形成非本征基极。 之后,本发明去除发射器基座并最终形成发射器底座所在的发射极。

    BIPOLAR TRANSISTOR SELF-ALIGNMENT WITH RAISED EXTRINSIC BASE EXTENSION AND METHODS OF FORMING SAME
    7.
    发明申请
    BIPOLAR TRANSISTOR SELF-ALIGNMENT WITH RAISED EXTRINSIC BASE EXTENSION AND METHODS OF FORMING SAME 有权
    具有增强的极限基底延伸的双极晶体管自对准及其形成方法

    公开(公告)号:US20050012180A1

    公开(公告)日:2005-01-20

    申请号:US10604212

    申请日:2003-07-01

    摘要: A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrinsic base to the emitter is accomplished by forming the extrinsic base in two regions. First, a first material of silicon or polysilicon having a first doping concentration is provided to form an outer extrinsic base region. Then a first opening is formed in the first material layer by lithography within which a dummy emitter pedestal is formed, which results in forming a trench between the sidewall of the first opening and the dummy pedestal. A second material of a second doping concentration is then provided inside the trench forming a distinct inner extrinsic base extension region to self-align the raised extrinsic base edge to the dummy pedestal edge. Since the emitter is formed where the dummy pedestal existed, the extrinsic base is also self-aligned to the emitter. The silicon or polysilicon forming the inner extrinsic base extension region can also be grown in the trench with selective or non-selective epitaxy.

    摘要翻译: 公开了具有包括外部区域和不同掺杂浓度的内部区域的升高的外部基极的自对准双极晶体管结构和制造晶体管的方法。 更具体地说,外部碱基与发射体的自对准是通过在两个区域中形成外部碱基来实现的。 首先,提供具有第一掺杂浓度的硅或多晶硅的第一材料以形成外部外在基极区域。 然后通过光刻形成在第一材料层中的第一开口,在该第一材料层内形成有虚拟发射极基座,这导致在第一开口的侧壁和虚拟基座之间形成沟槽。 然后在沟槽的内部提供第二掺杂浓度的第二材料,形成不同的内部非本征基本延伸区域,以将凸起的本征基底边缘自对准到虚拟基座边缘。 由于发射极形成在存在虚拟基座的位置,所以外部基极也与发射极自对准。 形成内部非本征基极延伸区域的硅或多晶硅也可以在具有选择性或非选择性外延的沟槽中生长。

    Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
    9.
    发明授权
    Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same 失效
    双极晶体管具有可选择的自对准的外部基极和其形成方法

    公开(公告)号:US07253096B2

    公开(公告)日:2007-08-07

    申请号:US11289915

    申请日:2005-11-30

    IPC分类号: H01L21/4763

    摘要: A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.

    摘要翻译: 公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。 制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。 然后通过在第一非本征基层上的光刻形成电介质着色焊盘。 接下来,在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层,以最终确定凸出的非本征基本总厚度。 使用光刻和RIE形成发射器开口,其中第二外部基极层被蚀刻停止在电介质着色焊盘上。 通过选择第一非本征基极层厚度,电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

    BIPOLAR TRANSISTOR WITH LOW RESISTANCE BASE CONTACT AND METHOD OF MAKING THE SAME
    10.
    发明申请
    BIPOLAR TRANSISTOR WITH LOW RESISTANCE BASE CONTACT AND METHOD OF MAKING THE SAME 审中-公开
    具有低电阻基底接触的双极晶体管及其制造方法

    公开(公告)号:US20090065804A1

    公开(公告)日:2009-03-12

    申请号:US11852507

    申请日:2007-09-10

    IPC分类号: H01L29/737 H01L21/331

    摘要: Embodiments of the present invention provide a bipolar transistor with low resistance base contact and method of manufacturing the same. The bipolar transistor includes an emitter, a collector, and an intrinsic base between the emitter and the collector. The intrinsic base extends laterally to an extrinsic base. The extrinsic base further includes a first semiconductor material with a first bandgap and a second semiconductor material with a second bandgap that is smaller than the first bandgap.

    摘要翻译: 本发明的实施例提供一种具有低电阻基极触点的双极晶体管及其制造方法。 双极晶体管包括在发射极和集电极之间的发射极,集电极和本征基极。 本征基础横向扩展到外在基础。 外部基极还包括具有第一带隙的第一半导体材料和具有小于第一带隙的第二带隙的第二半导体材料。