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    Plasma processing method and apparatus
    3.
    发明授权
    Plasma processing method and apparatus 有权
    等离子体处理方法和装置

    公开(公告)号：US07481230B2

    公开(公告)日：2009-01-27

    申请号：US10715859

    申请日：2003-11-19

    申请人： Hiromi Sakima

    发明人： Hiromi Sakima

    IPC分类号： C25F3/02

    CPC分类号： H01L21/67069 ,  H01J37/32862 ,  H01L21/67028 ,  Y10S134/902 ,  Y10S438/905

    摘要： A plasma processing method allows to suppress the drop of the etching rate of the depoless-process without performing an additional seasoning process right after the dry cleaning process. The method includes a first and a second plasma processing step carried out in a single chamber and a step of dry cleaning an inside of the chamber by using a dummy substrate between the first and the second plasma processing step. Deposits are substantially accumulated in the chamber during the first plasma processing step, while substantially no deposits are accumulated in the chamber during the second plasma processing step. The dry cleaning step is performed by supplying into the chamber a deposit removing gas for removing the deposits produced in the chamber during the first plasma processing step and a dummy substrate etching gas capable of etching the dummy substrate.

    摘要翻译： 等离子体处理方法允许在干洗过程之后立即进行附加的调味处理，抑制无溶剂处理的蚀刻速率的下降。 该方法包括在单个室中执行的第一等离子体处理步骤和第二等离子体处理步骤以及通过在第一和第二等离子体处理步骤之间使用虚设基板干燥室内的步骤。 在第一等离子体处理步骤期间，沉积物基本上积聚在室中，而在第二等离子体处理步骤期间基本上没有沉积物积聚在室中。 通过向室内供给用于去除在第一等离子体处理步骤期间在室中产生的沉积物的沉积物去除气体和能够蚀刻虚设衬底的虚拟衬底蚀刻气体来进行干法清洁步骤。

    Plasma etching apparatus
    4.
    发明授权
    Plasma etching apparatus 失效
    等离子刻蚀装置

    公开(公告)号：US5556500A

    公开(公告)日：1996-09-17

    申请号：US398667

    申请日：1995-03-03

    申请人： Makoto Hasegawa ,  Hiromi Sakima ,  Hiromitsu Kanbara ,  Yoshio Ishikawa ,  Yasuo Imamura ,  Makoto Aoki

    发明人： Makoto Hasegawa ,  Hiromi Sakima ,  Hiromitsu Kanbara ,  Yoshio Ishikawa ,  Yasuo Imamura ,  Makoto Aoki

    IPC分类号： H01L21/302 ,  C23F4/00 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/683 ,  H05H1/00

    CPC分类号： H01J37/32623 ,  H01J37/32642 ,  H01L21/6833 ,  H01J2237/2001 ,  Y10S156/915

    摘要： An apparatus for etching a WSi film on a wafer by using a plasma of a gas containing a halogen element includes a vacuum process chamber in which upper and lower counter electrodes are provided. An electrostatic chuck is provided on a table at the center of a susceptor or the lower electrode. The wafer is held on the electrostatic chuck. A focus ring surrounding the wafer in a complementary manner is placed on a flange of the susceptor. The temperature of the wafer surface is set to be lower than that of the surface of the focus ring while the plasma is being generated. The focus ring comprises an inner part of amorphous carbon and an outer part of tungsten. While the plasma is being generated, a halide of tungsten generated from the outer part is diffused on the wafer surface, thereby correcting a distribution of the amount of the halide of tungsten on the wafer surface. Thus, the uniformity within the wafer surface of the etching rate and etching anisotropy is enhanced.

    摘要翻译： 通过使用包含卤素元素的气体的等离子体在晶片上蚀刻WSi膜的装置包括设置有上下对置电极的真空处理室。 在基座或下电极的中心的台上设置静电卡盘。 晶片保持在静电卡盘上。 以互补方式围绕晶片的聚焦环放置在基座的凸缘上。 当产生等离子体时，晶片表面的温度被设定为低于聚焦环表面的温度。 聚焦环包括无定形碳的内部和钨的外部。 当产生等离子体时，从外部产生的钨卤化物在晶片表面上扩散，由此校正晶片表面上钨的卤化物的量的分布。 因此，提高了晶片表面的蚀刻速度和蚀刻各向异性的均匀性。

    Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics
    5.
    发明授权
    Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics 有权
    对于低k电介质的双镶嵌图案，沟槽蚀刻中的缺陷和蚀刻速率控制

    公开(公告)号：US06455411B1

    公开(公告)日：2002-09-24

    申请号：US09947966

    申请日：2001-09-06

    申请人： Ping Jiang ,  Francis G. Celii ,  Kenneth J. Newton ,  Hiromi Sakima

    发明人： Ping Jiang ,  Francis G. Celii ,  Kenneth J. Newton ,  Hiromi Sakima

    IPC分类号： H01L21308

    CPC分类号： H01L21/76808 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144

    摘要： A dual damascene process for low-k or ultra low-k dielectric such as organo-silicate glass (OSG). After the via (112) etch, a trench (121) is etched in the OSG layer (108) using a less-polymerizing fluorocarbon added to an etch chemistry comprising a fluorocarbon and low N2/Ar ratio. The low N2/Ar ratio controls ridge formation during the trench etch. The combination of a less-polymerizing fluorocarbon with a higher-polymerizing fluorocarbon achieves a high etch rate and defect-free conditions.

    摘要翻译： 用于低k或超低k电介质的双镶嵌工艺，如有机硅酸盐玻璃（OSG）。 在通孔（112）蚀刻之后，使用添加到包含碳氟化合物和低N 2 / Ar比的蚀刻化学品中的较少聚合的碳氟化合物在OSG层（108）中蚀刻沟槽（121）。 低N 2 / Ar比控制沟槽蚀刻期间的脊形成。 低聚碳氟化合物与较高聚合碳氟化合物的组合实现了高蚀刻速率和无缺陷条件。