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公开(公告)号:US20110147871A1
公开(公告)日:2011-06-23
申请号:US13036232
申请日:2011-02-28
申请人: Masaki UTSUMI , Takahiro NAKANO , Hikari SANO
发明人: Masaki UTSUMI , Takahiro NAKANO , Hikari SANO
IPC分类号: H01L31/0232 , H01L31/18
CPC分类号: H01L27/14625 , H01L21/561 , H01L23/3128 , H01L27/14618 , H01L27/14685 , H01L27/14687 , H01L2224/13
摘要: To provide a semiconductor device and a method of manufacturing the same, which have a device structure ensuring high degrees of reliability and mass-productivity at low cost.A semiconductor device includes: a substrate including an imaging area and having a first main surface and a second main surface; an electrode formed on the first main surface; an external electrode formed on the second main surface; a conductive portion which is formed in a through hole penetrating the substrate, and electrically connects the electrode and the external electrode; an optical element which is placed on the first main surface and has a convex surface including a convex portion; and a light transmitting element which is bonded to the optical element so as to cover the convex portion and has a flat upper surface.
摘要翻译: 提供一种以低成本确保高可靠性和大规模生产率的器件结构的半导体器件及其制造方法。 半导体器件包括:基板,包括成像区域并具有第一主表面和第二主表面; 形成在所述第一主表面上的电极; 形成在所述第二主表面上的外部电极; 导电部,形成在穿过所述基板的通孔中,并且电连接所述电极和所述外部电极; 光学元件,其放置在所述第一主表面上并且具有包括凸部的凸面; 以及透光元件,其结合到所述光学元件以覆盖所述凸部并且具有平坦的上表面。
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公开(公告)号:US20120018820A1
公开(公告)日:2012-01-26
申请号:US13247226
申请日:2011-09-28
申请人: Masaki UTSUMI , Kyoko FUJII , Takahiro NAKANO
发明人: Masaki UTSUMI , Kyoko FUJII , Takahiro NAKANO
IPC分类号: H01L29/84
CPC分类号: H04R19/04 , B81B2201/0257 , B81C1/0023 , H01L23/055 , H01L2224/48091 , H01L2224/73265 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要: A semiconductor device includes a converter that converts an acoustic pressure into an electrical signal and an amplifier element that includes an amplifier circuit that amplifies the electrical signal outputted from the converter. The converter includes a pedestal including a cavity formed from an upper face to a lower face thereof, and a vibration film located so as to cover an opening of the cavity on the side of the upper face. The vibration film vibrates in accordance with the acoustic pressure to thereby convert the acoustic pressure into an electrical signal. The amplifier element is located under the converter so as to cover the cavity.
摘要翻译: 半导体器件包括将声压转换为电信号的转换器和包括放大从转换器输出的电信号的放大器电路的放大器元件。 该转换器包括:底座,其包括由上表面到下表面形成的空腔;以及振动膜,其位于上表面侧的空腔的开口上。 振动膜根据声压而振动,从而将声压转换为电信号。 放大器元件位于转换器下方以覆盖空腔。
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公开(公告)号:US20110039365A1
公开(公告)日:2011-02-17
申请号:US12913340
申请日:2010-10-27
IPC分类号: H01L21/02
CPC分类号: B81C1/00896 , B23K26/40 , B23K2101/40 , B23K2103/50 , B81B2201/0257
摘要: A method for fabricating a semiconductor device includes: the step (a) of forming a vibrating film on a predetermined region of each of a plurality of chips included in a semiconductor wafer; the step (b) of forming, on the semiconductor wafer, an intermediate film containing a sacrifice layer located on the vibrating film of each of the chips; and the step (c) of forming a fixed film on the intermediate film. This method further includes, after the step (c), the step (d) of subjecting the semiconductor wafer to blade dicing to separate the chips, and the step (e) of removing, by etching, the sacrifice layer to provide a cavity between the vibrating film and the fixed film.
摘要翻译: 一种制造半导体器件的方法包括:在包括在半导体晶片中的多个芯片中的每一个的预定区域上形成振动膜的步骤(a); 在半导体晶片上形成包含位于每个芯片的振动膜上的牺牲层的中间膜的步骤(b) 以及在中间膜上形成固定膜的步骤(c)。 该方法还包括在步骤(c)之后,对半导体晶片进行切片以分离芯片的步骤(d),以及通过蚀刻去除牺牲层以在第 振动膜和固定膜。
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公开(公告)号:US20100022046A1
公开(公告)日:2010-01-28
申请号:US12578040
申请日:2009-10-13
IPC分类号: H01L21/00
CPC分类号: B81C1/00896 , B23K26/40 , B23K2101/40 , B23K2103/50 , B81B2201/0257
摘要: A method for fabricating a semiconductor device includes: the step (a) of forming a vibrating film on a predetermined region of each of a plurality of chips included in a semiconductor wafer; the step (b) of forming, on the semiconductor wafer, an intermediate film containing a sacrifice layer located on the vibrating film of each of the chips; and the step (c) of forming a fixed film on the intermediate film. This method further includes, after the step (c), the step (d) of subjecting the semiconductor wafer to blade dicing to separate the chips, and the step (e) of removing, by etching, the sacrifice layer to provide a cavity between the vibrating film and the fixed film.
摘要翻译: 一种制造半导体器件的方法包括:在包括在半导体晶片中的多个芯片中的每一个的预定区域上形成振动膜的步骤(a); 在半导体晶片上形成包含位于每个芯片的振动膜上的牺牲层的中间膜的步骤(b) 以及在中间膜上形成固定膜的步骤(c)。 该方法还包括在步骤(c)之后,对半导体晶片进行切片以分离芯片的步骤(d),以及通过蚀刻去除牺牲层以在第 振动膜和固定膜。
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公开(公告)号:US20120280401A1
公开(公告)日:2012-11-08
申请号:US13551425
申请日:2012-07-17
申请人: Makoto TSUTSUE , Masaki UTSUMI
发明人: Makoto TSUTSUE , Masaki UTSUMI
IPC分类号: H01L23/48
CPC分类号: H01L23/585 , H01L23/3171 , H01L23/3192 , H01L23/522 , H01L23/5226 , H01L23/528 , H01L23/562 , H01L23/564 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要: A seal ring structure is formed through a multilayer structure of a plurality of dielectric films in a peripheral part of a chip region to surround the chip region. A dual damascene interconnect in which an interconnect and a plug connected to the interconnect are integrated is formed in at least one of the dielectric films in the chip region. Part of the seal ring structure formed in the dielectric film in which the dual damascene interconnect is formed is continuous. A protection film formed on the multilayer structure has an opening on the seal ring. A cap layer connected to the seal ring is formed in the opening.
摘要翻译: 通过在芯片区域的外围部分中的多个电介质膜的多层结构形成密封环结构,以围绕芯片区域。 在芯片区域中的至少一个电介质膜中形成双组件镶嵌互连,其中互连和连接到互连的插头被集成。 在其中形成双镶嵌互连的电介质膜中形成的密封环结构的一部分是连续的。 形成在多层结构上的保护膜在密封环上具有开口。 连接到密封环的盖层形成在开口中。
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公开(公告)号:US20090065903A1
公开(公告)日:2009-03-12
申请号:US12264675
申请日:2008-11-04
申请人: Makoto TSUTSUE , Masaki UTSUMI
发明人: Makoto TSUTSUE , Masaki UTSUMI
IPC分类号: H01L23/00
CPC分类号: H01L23/585 , H01L23/3171 , H01L23/3192 , H01L23/522 , H01L23/5226 , H01L23/528 , H01L23/562 , H01L23/564 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要: A seal ring structure is formed through a multilayer structure of a plurality of dielectric films in a peripheral part of a chip region to surround the chip region. A dual damascene interconnect in which an interconnect and a plug connected to the interconnect are integrated is formed in at least one of the dielectric films in the chip region. Part of the seal ring structure formed in the dielectric film in which the dual damascene interconnect is formed is continuous. A protection film formed on the multilayer structure has an opening on the seal ring. A cap layer connected to the seal ring is formed in the opening.
摘要翻译: 通过在芯片区域的外围部分中的多个电介质膜的多层结构形成密封环结构,以围绕芯片区域。 在芯片区域中的至少一个电介质膜中形成双组件镶嵌互连,其中互连和连接到互连的插头被集成。 在其中形成双镶嵌互连的电介质膜中形成的密封环结构的一部分是连续的。 形成在多层结构上的保护膜在密封环上具有开口。 连接到密封环的盖层形成在开口中。
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