MEMORY CONTROLLER, INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING MEMORY CONTROLLER
    1.
    发明申请
    MEMORY CONTROLLER, INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING MEMORY CONTROLLER 审中-公开
    存储器控制器,信息处理装置和控制存储器控制器的方法

    公开(公告)号:US20120239996A1

    公开(公告)日:2012-09-20

    申请号:US13402284

    申请日:2012-02-22

    IPC分类号: G06F11/07

    CPC分类号: G06F11/1048

    摘要: A memory controller which is connected to a memory module having an ECC (Error Check and Correction) function and which controls access to the memory module, the memory controller, has an error detection unit configured to detect an error bit and a position of the error bit by reading, from the memory module, information on codes of the ECCs corresponding to a plurality of read data read from the memory module, a buffer configured to temporarily store the plurality of read data, and a determination unit configured to determine, when the plurality of read data stored in the buffer include a number of data in which a correctable error is detected by the error detection unit and error detection positions of the detected data are the same as each other, that a correctable error is included in a group of the plurality of read data.

    摘要翻译: 连接到具有ECC(错误检查和校正)功能并且控制对存储器模块的访问的存储器模块的存储器控​​制器,存储器控制器具有错误检测单元,其被配置为检测错误位和错误的位置 通过从存储器模块读取与从存储器模块读取的多个读取数据相对应的ECC的代码的信息,配置为临时存储多个读取数据的缓冲器,以及确定单元, 存储在缓冲器中的多个读取数据包括由错误检测单元检测到可校正错误的数据的数量,并且检测到的数据的错误检测位置彼此相同,可纠正错误被包括在一组 多个读取数据。

    System and method for data packet transmission and reception
    2.
    发明授权
    System and method for data packet transmission and reception 失效
    数据包发送和接收的系统和方法

    公开(公告)号:US08631152B2

    公开(公告)日:2014-01-14

    申请号:US12385885

    申请日:2009-04-22

    IPC分类号: G06F15/16

    CPC分类号: G06F13/387

    摘要: A system transmits a data packet from a transmitting apparatus to a receiving apparatus. The receiving apparatus includes a receive buffer, and a size specifying information transmitting unit that transmits size specifying information to the transmitting apparatus. The transmitting apparatus includes a transmit buffer, a credit storage unit that stores, as a credit, a value corresponding to a total size of all data packets stored in the receive buffer, a credit adding unit that adds a credit to the stored credit on transmitting a data packet, a credit subtracting unit that specifies a size of a read-out data packet on receiving the size specifying information, subtracts a credit corresponding to the specified size from a stored credit, and a transmission controlling unit that controls data packet transmission based on a credit stored in the credit storage unit.

    摘要翻译: 系统将数据分组从发送装置发送到接收装置。 接收装置包括接收缓冲器和向发送装置发送大小指定信息的大小指定信息发送单元。 发送装置包括发送缓冲器,信用存储单元,作为信用存储对应于存储在接收缓冲器中的所有数据分组的总大小的值;信用增加单元,用于向所发送的存储信用增加信用 数据分组,信用减除单元,其在接收到大小指定信息时指定读出数据分组的大小,从存储的积分中减去与规定大小相对应的信用,以及控制数据分组发送的发送控制部, 存储在信用存储单元中的信用。

    System and method for data packet transmission and reception
    4.
    发明申请
    System and method for data packet transmission and reception 失效
    数据包发送和接收的系统和方法

    公开(公告)号:US20090207850A1

    公开(公告)日:2009-08-20

    申请号:US12385885

    申请日:2009-04-22

    IPC分类号: H04L12/56

    CPC分类号: G06F13/387

    摘要: A system transmits a data packet from a transmitting apparatus to a receiving apparatus. The receiving apparatus includes a receive buffer, and a size specifying information transmitting unit that transmits size specifying information to the transmitting apparatus. The transmitting apparatus includes a transmit buffer, a credit storage unit that stores, as a credit, a value corresponding to a total size of all data packets stored in the receive buffer, a credit adding unit that adds a credit to the stored credit on transmitting a data packet, a credit subtracting unit that specifies a size of a read-out data packet on receiving the size specifying information, subtracts a credit corresponding to the specified size from a stored credit, and a transmission controlling unit that controls data packet transmission based on a credit stored in the credit storage unit.

    摘要翻译: 系统将数据分组从发送装置发送到接收装置。 接收装置包括接收缓冲器和向发送装置发送大小指定信息的大小指定信息发送单元。 发送装置包括发送缓冲器,信用存储单元,作为信用存储对应于存储在接收缓冲器中的所有数据分组的总大小的值;信用增加单元,用于向所发送的存储信用增加信用 数据分组,信用减除单元,其在接收到大小指定信息时指定读出数据分组的大小,从存储的积分中减去与规定大小相对应的信用,以及控制数据分组发送的发送控制部, 存储在信用存储单元中的信用。

    Information processing apparatus and control method therefor
    5.
    发明申请
    Information processing apparatus and control method therefor 有权
    信息处理装置及其控制方法

    公开(公告)号:US20080046769A1

    公开(公告)日:2008-02-21

    申请号:US11790260

    申请日:2007-04-24

    IPC分类号: G06F1/30

    摘要: A mutual electrically connecting part mutually connects a plurality of information processing parts, wherein the mutual connecting part comprises a phase adjusting part configured to adjust a phase from each of the respective ones of the plurality of information processing parts; and the mutual connecting part further has a power supply cut signal transmitting part transmitting a power supply cut signal, indicating that power supply to any one of the plurality of information processing parts is cut, to the phase adjusting part corresponding to the information processing part; and an initializing part initializing the phase adjusting part corresponding to the information proceeding part for which power supply is cut, in response to the transmission of the power supply cut signal from the power supply cut signal transmitting part.

    摘要翻译: 相互电连接部分相互连接多个信息处理部分,其中相互连接部分包括被配置为调整来自多个信息处理部分中的相应信息处理部分的相位的相位调整部分; 所述相互连接部还具有将与所述信息处理部对应的所述相位调整部发送指示向所述多个信息处理部中的任一个切断电力的供电切断信号的供电切断信号发送部, 以及初始化部分,响应于来自电源切断信号发送部分的电源切断信号的传输,初始化对应于切断电源的信息进行部分的相位调整部分。

    Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal
    6.
    发明授权
    Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal 有权
    响应于电源切断信号初始化相位调整部件的装置和控制方法

    公开(公告)号:US07814356B2

    公开(公告)日:2010-10-12

    申请号:US11790260

    申请日:2007-04-24

    摘要: A mutual electrically connecting part mutually connects a plurality of information processing parts, wherein the mutual connecting part comprises a phase adjusting part configured to adjust a phase from each of the respective ones of the plurality of information processing parts; and the mutual connecting part further has a power supply cut signal transmitting part transmitting a power supply cut signal, indicating that power supply to any one of the plurality of information processing parts is cut, to the phase adjusting part corresponding to the information processing part; and an initializing part initializing the phase adjusting part corresponding to the information proceeding part for which power supply is cut, in response to the transmission of the power supply cut signal from the power supply cut signal transmitting part.

    摘要翻译: 相互电连接部分相互连接多个信息处理部分,其中相互连接部分包括被配置为调整来自多个信息处理部分中的相应信息处理部分的相位的相位调整部分; 所述相互连接部还具有将与所述信息处理部对应的所述相位调整部发送指示向所述多个信息处理部中的任一个切断电力的供电切断信号的供电切断信号发送部, 以及初始化部分,响应于来自电源切断信号发送部分的电源切断信号的传输,初始化对应于切断电源的信息进行部分的相位调整部分。

    Information processing device, data transmitting device, and data transfer method of data transmitting device
    8.
    发明授权
    Information processing device, data transmitting device, and data transfer method of data transmitting device 失效
    数据发送装置的信息处理装置,数据发送装置以及数据传送方法

    公开(公告)号:US08312340B2

    公开(公告)日:2012-11-13

    申请号:US12926690

    申请日:2010-12-03

    IPC分类号: H03M13/00 H04L1/18

    摘要: A selection-signal generating circuit in an LSI being a transmission-side LSI, when a transmission error is detected on an A-side signal line and degeneration control is performed thereon, instructs a selector to select an input from an ECC generator in order to transmit data and ECC data for this data to be transmitted via the B-side signal line, via the A-side signal line. In this manner, the degenerated signal line is used to transmit the ECC data for transmission data to be transmitted via a signal line which is not degenerated.

    摘要翻译: 作为发送侧LSI的LSI中的选择信号生成电路,当在A侧信号线上检测到发送错误并进行退化控制时,指示选择器从ECC发生器选择输入,以便 通过A侧信号线经由B侧信号线发送该数据的数据和ECC数据。 以这种方式,退化的信号线用于发送经由不退化的信号线发送的发送数据的ECC数据。

    Probe card for semiconductor wafer
    10.
    发明授权
    Probe card for semiconductor wafer 有权
    半导体晶圆探头卡

    公开(公告)号:US08159251B2

    公开(公告)日:2012-04-17

    申请号:US12801790

    申请日:2010-06-25

    IPC分类号: G01R31/00

    CPC分类号: G01R1/07314 G01R1/44

    摘要: A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring.

    摘要翻译: 探针卡包括接触设置在半导体晶片中的多个电极并且在电极内或从电极输入或输出电信号的多个探针,保持探针的探针头,具有接近设置的布线的基板 所述基板的表面面向所述探针头,以便能够与所述探针头接触,并且与所述探针相连接,所述芯层由掩埋在所述基板中的材料形成,并且具有低于所述探针的热膨胀系数 基板和连接构件,其通过布线将至少一些探针与外部装置电连接。