公开(公告)号：US06600779B1

公开(公告)日：2003-07-29

申请号：US09274350

申请日：1999-03-23

申请人： Masaru Sawada ,  Tsuyoshi Tomita ,  Yoshitaka Nakata ,  Tsunehiko Moriuchi ,  Kenichi Yamakura ,  Hideaki Tanishima ,  Fumiaki Uematsu ,  Koji Horibe ,  Manabu Nakano

发明人： Masaru Sawada ,  Tsuyoshi Tomita ,  Yoshitaka Nakata ,  Tsunehiko Moriuchi ,  Kenichi Yamakura ,  Hideaki Tanishima ,  Fumiaki Uematsu ,  Koji Horibe ,  Manabu Nakano

IPC分类号： H03H730

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/18

摘要： A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

摘要翻译： 用于处理表示存储在磁盘上的数据的模拟读取信号的信号处理器允许更快的读取操作，而不需要增加其电路面积或缓冲存储器空间。 信号处理器包括判决反馈均衡器，其在再现从存储介质读取的数据时选择性地提供添加到读取信号的反馈信号。 信号处理器还执行纠错。 在执行纠错时，检测出纠错处理的负载，并且根据检测到的负载改变处理速度。

公开(公告)号：US07023946B2

公开(公告)日：2006-04-04

申请号：US10288286

申请日：2002-11-06

申请人： Masaru Sawada ,  Tsuyoshi Tomita ,  Yoshitaka Nakata ,  Tsunehiko Moriuchi ,  Kenichi Yamakura ,  Hideaki Tanishima ,  Fumiaki Uematsu ,  Koji Horibe ,  Manabu Nakano

发明人： Masaru Sawada ,  Tsuyoshi Tomita ,  Yoshitaka Nakata ,  Tsunehiko Moriuchi ,  Kenichi Yamakura ,  Hideaki Tanishima ,  Fumiaki Uematsu ,  Koji Horibe ,  Manabu Nakano

IPC分类号： H03D3/24

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/18

摘要： A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

公开(公告)号：US06671112B2

公开(公告)日：2003-12-30

申请号：US10023769

申请日：2001-12-21

申请人： Hiroko Murakami ,  Masaru Sawada ,  Manabu Nakano ,  Kazuyoshi Kikuta

发明人： Hiroko Murakami ,  Masaru Sawada ,  Manabu Nakano ,  Kazuyoshi Kikuta

IPC分类号： G11B509

CPC分类号： H03L7/0993 ,  G11B5/012 ,  G11B5/553 ,  G11B5/59622 ,  H03L7/091

摘要： A digital arithmetic operation circuit includes a plurality of arithmetic operation blocks, a control signal generator and a selector. The plurality of arithmetic operation blocks receive a plurality of digital input signals and perform different arithmetic operations on the received digital input signals, in parallel, to output operation result signals. The a control signal generator receives a plurality of digital input signals and generates a control signal based on the digital input signals. The selector selects one of the operation result signals, in response to the control signal, to output the selected operation result signal. After the control signal generator supplies the control signal to the selector, the selector outputs the selected operation result signal as soon as the selected operation result signal is supplied to the selector.

摘要翻译： 数字运算电路包括多个算术运算块，控制信号发生器和选择器。 多个算术运算块并行地接收多个数字输入信号，并对接收的数字输入信号进行不同的算术运算，以输出运算结果信号。 控制信号发生器接收多个数字输入信号，并根据数字输入信号产生控制信号。 选择器响应于控制信号选择一个操作结果信号，以输出所选择的运算结果信号。 在控制信号发生器将控制信号提供给选择器之后，一旦选择的操作结果信号被提供给选择器，选择器输出所选择的运算结果信号。

公开(公告)号：US08069287B2

公开(公告)日：2011-11-29

申请号：US11065563

申请日：2005-02-25

申请人： Manabu Nakano

发明人： Manabu Nakano

IPC分类号： G06F13/00 ,  G06F13/14 ,  G06F13/36 ,  H04L12/28

CPC分类号： G06F13/4072 ,  G06F13/426

摘要： An SE0 timer detects that an SE0 state of a universal serial bus continues for 3 ms or more, and asserts an SE03ms detected signal to a suspending/reset discriminating circuit. The suspending/reset discriminating circuit connects a pull-up resistor to a D+ data line, detects that the universal serial bus is in the SE0 state, and asserts a reset detected signal to a reset control circuit. The reset control circuit asserts a threshold level changing signal to a receiver for a high-speed mode. The receiver changes the threshold into 250 mV. When the reset control circuit detects a K state of the universal serial bus after chirp driving K is executed and ended, the reset control circuit negates the threshold level changing signal to the receiver. The receiver changes the threshold back to 125 mV.

摘要翻译： SE0定时器检测到通用串行总线的SE0状态持续3 ms或更长时间，并将一个SE03ms检测到的信号置于挂起/复位识别电路。 暂停/复位识别电路将上拉电阻连接到D +数据线，检测通用串行总线处于SE0状态，并将复位检测信号置于复位控制电路。 复位控制电路向高速模式的接收器断言阈值电平改变信号。 接收器将阈值更改为250 mV。 当复位控制电路在啁啾驱动K被执行并结束之后检测到通用串行总线的K状态时，复位控制电路将接收器的阈值电平改变信号否定。 接收器将阈值改为125 mV。

公开(公告)号：US07082548B2

公开(公告)日：2006-07-25

申请号：US09793539

申请日：2001-02-27

申请人： Manabu Nakano

发明人： Manabu Nakano

IPC分类号： G06F11/00

CPC分类号： G06F11/2071 ,  G06F11/1612 ,  G06F11/2066 ,  Y10S707/99953

摘要： A backup system which can improve reliability of data without sacrificing availability of a data processing system and a duplicating apparatus employed in the backup system. The backup system includes a duplicating apparatus for taking in data in the transfer of the data and codes from a host apparatus to a storage apparatus and holding the data as duplicated data, the duplicating apparatus including a code fetching unit to fetch the codes and hold the fetched codes as duplicated codes, and a data verifying unit to verify existence or nonexistence of an error in the data by comparing the taken data and the duplicated data.

摘要翻译： 一种可以提高数据可靠性而不牺牲备份系统中使用的数据处理系统和复制装置的可用性的备用系统。 该备份系统包括一个复制装置，用于从主机装置向存储装置传送数据和代码的数据，并将数据保存为复制数据，该复制装置包括一个代码取出单元，用于获取代码并保持 取出的代码作为重复代码，以及数据验证单元，通过比较所获取的数据和复制的数据来验证数据中的错误的存在或不存在。

公开(公告)号：US4571122A

公开(公告)日：1986-02-18

申请号：US655528

申请日：1984-09-28

申请人： Hiroshi Yamamoto ,  Shuichi Satoh ,  Yoshiyuki Iwai ,  Osamu Ae ,  Masao Suda ,  Minoru Shiozaki ,  Kiyoshi Tsuchiya ,  Manabu Nakano ,  Kojiro Ogata ,  Naoki Miyanagi ,  Kozo Ono ,  Nobuyuki Tobita

发明人： Hiroshi Yamamoto ,  Shuichi Satoh ,  Yoshiyuki Iwai ,  Osamu Ae ,  Masao Suda ,  Minoru Shiozaki ,  Kiyoshi Tsuchiya ,  Manabu Nakano ,  Kojiro Ogata ,  Naoki Miyanagi ,  Kozo Ono ,  Nobuyuki Tobita

IPC分类号： E21D9/06 ,  E21B4/16 ,  E21B7/04 ,  E21B7/06 ,  E21B7/20 ,  E21B7/24 ,  F16L1/00

CPC分类号： E21B7/208 ,  E21B4/16 ,  E21B7/046 ,  E21B7/067 ,  E21B7/24

摘要： A pipe laying apparatus including an excavator propulsion unit located in a starting pit. The excavator includes an excavator body having a first axis, an excavating tool having a second axis and located at a forward end portion of the excavator body, and injection ports formed in the excavating tool for injecting a viscosity imparting liquid into soil as excavated. The excavator body has a rearward portion thereof disposed adjacent pipes to be laid each having an outer diameter smaller than the outer diameter of the excavating tool and positioned at a rearward end thereof against the propulsion means, and is operative to excavate the earth to form a hole therein while the viscosity imparting liquid is being injected through the injection ports into the soil as excavated to thereby produce a viscosity imparting liquid containing soil which is conveyed rearwardly through an outer periphery of the excavator body while being filled in an annular clearance defined between the hole formed in the earth and the pipes to be laid, so that the pipes can be successively laid as the excavator body and the pipes are propelled forwardly by the propulsion unit.

摘要翻译： 一种管道铺设设备，包括位于起始坑中的挖掘机推进单元。 挖掘机包括具有第一轴线的挖掘机主体，具有第二轴线的挖掘工具，位于挖掘机主体的前端部，以及形成在挖掘工具中的喷射口，用于将粘性赋予液体注入挖掘的土壤中。 挖掘机主体的后部设有相邻的管道，每个管道的外径小于挖掘工具的外径，并且其后端抵靠推进装置，并且可操作地挖掘地面以形成 其中粘性赋予液体通过注入口被喷射到挖掘的土壤中，从而产生含有土壤的粘性赋予液体，该污染物被向后传送通过挖掘机主体的外周，同时填充在限定在 在地面上形成的孔和待铺设的管道，使得管道可以连续铺设为挖掘机主体，并且管道被推进单元向前推进。

公开(公告)号：US07076580B2

公开(公告)日：2006-07-11

申请号：US10669326

申请日：2003-09-25

申请人： Manabu Nakano

发明人： Manabu Nakano

IPC分类号： G06F13/00

CPC分类号： G06F3/0607 ,  G06F3/0659 ,  G06F3/0661 ,  G06F3/0674 ,  G06F13/4018

摘要： An interface converter for functionally connecting external devices having interfaces complying with different standards. The interface converter includes a USB-ATAPI command converter and a USB-ATA command converter. A switching controller checks the type of the interface of each external device and activates one of the command converters in accordance with the result of the checking.

摘要翻译： 一种用于功能连接具有符合不同标准接口的外部设备的接口转换器。 该接口转换器包括一个USB-ATAPI命令转换器和一个USB-ATA命令转换器。 开关控制器检查每个外部设备的接口类型，并根据检查结果激活一个命令转换器。

公开(公告)号：US20050144345A1

公开(公告)日：2005-06-30

申请号：US11065563

申请日：2005-02-25

申请人： Manabu Nakano

发明人： Manabu Nakano

IPC分类号： G06F3/00 ,  G06F13/00 ,  G06F13/40 ,  G06F13/42

CPC分类号： G06F13/4072 ,  G06F13/426

摘要： An SE0 timer detects that an SE0 state of a universal serial bus continues for 3 ms or more, and asserts an SE03ms detected signal to a suspending/reset discriminating circuit. The suspending/reset discriminating circuit connects a pull-up resistor to a D+ data line, detects that the universal serial bus is in the SE0 state, and asserts a reset detected signal to a reset control circuit. The reset control circuit asserts a threshold level changing signal to a receiver for a high-speed mode. The receiver changes the threshold into 250 mV. When the reset control circuit detects a K state of the universal serial bus after chirp driving K is executed and ended, the reset control circuit negates the threshold level changing signal to the receiver. The receiver changes the threshold back to 125 mV.

摘要翻译： SE 0定时器检测到通用串行总线的SE 0状态持续3 ms以上，并将一个SE 03 ms检测到的信号置为挂起/复位识别电路。 挂起/复位识别电路将上拉电阻连接到D +数据线，检测到通用串行总线处于SE 0状态，并将复位检测信号置于复位控制电路。 复位控制电路向高速模式的接收器断言阈值电平改变信号。 接收器将阈值更改为250 mV。 当复位控制电路在啁啾驱动K被执行并结束之后检测到通用串行总线的K状态时，复位控制电路将接收器的阈值电平改变信号否定。 接收器将阈值改为125 mV。

公开(公告)号：US4653594A

公开(公告)日：1987-03-31

申请号：US614678

申请日：1984-05-29

申请人： Hiroshi Yamamoto ,  Shuichi Satoh ,  Yoshiyuki Iwai ,  Osamu Ae ,  Masao Suda ,  Minoru Shiozaki ,  Kiyoshi Tsuchiya ,  Manabu Nakano ,  Kojiro Ogata ,  Naoki Miyanagi ,  Kozo Ono ,  Nobuyuki Tobita

发明人： Hiroshi Yamamoto ,  Shuichi Satoh ,  Yoshiyuki Iwai ,  Osamu Ae ,  Masao Suda ,  Minoru Shiozaki ,  Kiyoshi Tsuchiya ,  Manabu Nakano ,  Kojiro Ogata ,  Naoki Miyanagi ,  Kozo Ono ,  Nobuyuki Tobita

IPC分类号： B06B1/16 ,  E21B7/24 ,  E02D7/18

CPC分类号： B06B1/168 ,  E21B7/24

摘要： A vibration generating apparatus including a support body having a first center axis, a first spherical joint element provided at a forward end of the support body and having the center of a sphere located on the first center axis, a vibrating body having a second center axis passing through the sphere center, a second spherical joint element provided on the vibrating body and concentric complementary with the first spherical joint element to cooperate therewith to allow the vibrating body to be supported on the support member for universal movement, a rotary shaft coaxially rotatably supported within the vibrating body, a pair of eccentric weights mounted on the rotary shaft with a phase deviation of 180 degrees and in a manner symmetrical with respect to the sphere center, and a drive motor connected to the rotary shaft for driving same for rotation whereby the pair of eccentric weights are rotated about the second center axis to cause the vibrating body to move in conical motion vibration such that the second center axis describes a circular cone having a vertex located at the sphere center about the first center axis.

摘要翻译： 一种振动发生装置，包括具有第一中心轴的支撑体，设置在所述支撑体的前端并具有位于所述第一中心轴上的球的中心的第一球形接头元件，具有第二中心轴线的振动体 穿过所述球体中心，设置在所述振动体上并与所述第一球形接头元件同心的第二球形接头元件，以与所述第一球形接头元件同心地配合，以允许所述振动体支撑在所述支撑构件上用于通用运动;旋转轴， 在振动体内，安装在旋转轴上的一对偏心重物，相位偏差为180度并以相对于球体中心对称的方式安装在驱动马达上，驱动马达连接到旋转轴上，用于驱动旋转轴旋转， 一对偏心重物围绕第二中心轴旋转，使振动体以圆锥运动的振动运动 使得第二中心轴描述具有围绕第一中心轴线位于球体中心的顶点的圆锥体。